C200 datasheet(53/82 Pages) INTEL

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Specification Update

Documentation Changes

s. The first sentence of section 2.20 is changed to “All signals are Mobile Only, except

as noted that are also available in Desktop.”

t. Table 8-17 title is changed from “HDMI Interface Timings (DDP[D:B][3:0])Timings”

to “HDMI Interface Timings (DDP[D:B][3:0])”.

u. Table 3-3 is updated to show that the PMSYNCH signal is Defined in Cx States.

v. Table 3-2 SML0ALERT# / GPIO60 note in Immediately after Reset is changed from 11

to 12.

w. Tables 3-2 and 3-3 note 7 removed from GPIO8 and GPIO27.

x. In section 13.8.3.5 GPE0_STS—General Purpose Event 0 Status Register, the SMBus

Wake Status (SMB_WAK_STS) bit description is updated remove “SCI” to reflect that

the SMBus controller can only generate an SMI#.

y. References to the Coprocessor Error Enable bit (RCBA+31FEh bit 9) mnemonic

“COPROC_ERR_EN” are changed to “CEN” to represent the actual mnemonic.

25 MHz Flex Clock AC Timings

a. The following rows are added to table 8-24 Clock Timings:

b. The following note is added to table 8-24:

16. The 25 MHz output option for CLKOUTFLEX2 is derived from the 25 MHz crystal

input to the PCH. The PPM of the 25 MHz output is equivalent to that of the crystal.

10.

Fan Speed Control Signals Functional Description Introduction

The following is added immediately before section 5.24.9:

5.25 Fan Speed Control Signals (Server/Workstation Only)

The PCH implements 4 PWM and 8 TACH signals for integrated fan speed control.

Note: Integrated fan speed control functionality requires a correctly configured system,

including an appropriate processor, Server/Workstation PCH with Intel ME, Intel ME

Firmware, and system BIOS support.

Bit

Description

Incorrect Port Multiplier Enable (IPME) — R/W. The PCH SATA controller does not

support Port Multipliers. BIOS and storage software should keep this bit cleared to 0.

Sym

Parameter

Min

Max

Unit

Notes

Figure

25 MHz Flex Clock

t51

Period

39.84

40.18

8-11

t52

High Time

16.77

21.78

8-11

t53

Low Time

16.37

21.58

8-11

Duty Cycle

Rising Edge Rate

1.0

V/ns

Falling Edge Rate

1.0

V/ns

Jitter (25 MHz configured on

CLKOUTFLEX2)

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C200 Datasheet(PDF) 53 Page - Intel Corporation

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