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C200 Datasheet(PDF) 36 Page - Intel Corporation

Part # C200
Description  Intel® 6 Series Chipset and Intel® C200 Series Chipset
PDF  82 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

C200 Datasheet(HTML) 36 Page - Intel Corporation

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Specification Clarifications
36
Specification Update
GPIO25
(Mobile
Only)
I/O
3.3 V
Suspend
Native
Yes
No
No
Mobile: Multiplexed with
PCIECLKRQ3#
GPIO24
I/O
3.3 V
Suspend
GPO
Yes
Yes
No
Desktop: Can be used as
PROC_MISSING configured
using Intel ME firmware.
Mobile: Unmultiplexed
NOTE: GPIO24 configuration
register bits are cleared
by RSMRST# and not
cleared by CF9h reset
event.
GPIO23
I/O
3.3 V
Core
Native
Yes
No
No
Multiplexed with LDRQ1#.
GPIO22
I/O
3.3 V
Core
GPI
Yes
No
No
Multiplexed with SCLOCK
GPIO21
I/O
3.3 V
Core
GPI
Yes
No
No
Multiplexed with SATA0GP
GPIO20
I/O
3.3 V
Core
Native
Yes
No
No
Multiplexed with
PCIECLKRQ2#, SMI#
GPIO198
I/O
3.3 V
Core
GPI
Yes
No
No
Multiplexed with SATA1GP
GPIO18
(Mobile
Only)
I/O
3.3 V
Core
Native
Yes6
No
No
Mobile: Multiplexed with
PCIECLKRQ1#
GPIO17
I/O
3.3 V
Core
GPI
Yes
No
No
Desktop: Multiplexed with
TACH0.
Mobile: Used as GPIO17 only.
GPIO16
I/O
3.3 V
Core
GPI
Yes
No
No
Multiplexed with SATA4GP
GPIO158
I/O
3.3 V
Suspend
GPO
Yes
No
Yes2
Unmultiplexed
GPIO14
I/O
3.3 V
Suspend
Native
Yes
No
Yes2
Multiplexed with OC7#
GPIO13
I/O
3.3 V
or
1.5 V11
HDA
Suspend
GPI
Yes
No
Yes2
Multiplexed with
HDA_DOCK_RST# (Mobile
Only)4.
Desktop: Used as GPIO only
GPIO12
I/O
3.3 V
Suspend
Native
Yes
No
Yes2
Multiplexed with
LAN_PHY_PWR_CTRL. GPIO /
Functionality controlled using
soft strap7,13
GPIO11
I/O
3.3 V
Suspend
Native
Yes
No
Yes2
Multiplexed with
SMBALERT#10.
GPIO10
I/O
3.3 V
Suspend
Native
Yes
No
Yes2
Multiplexed with OC6#10.
GPIO9
I/O
3.3 V
Suspend
Native
Yes
No
Yes2
Multiplexed with OC5#10.
GPIO8
I/O
3.3 V
Suspend
GPO
Yes
No
Yes2
Unmultiplexed
GPIO[7:6]
I/O
3.3 V
Core
GPI
Yes
No
Yes2
Multiplexed with TACH[3:2].
Mobile: Used as GPIO[7:6]
only.
GPIO[5:2]
I/OD
5 V
Core
GPI
Yes
No
Yes2
Multiplexed PIRQ[H:E]#5.
Table 2-24 General Purpose I/O Signals (Sheet 4 of 5)
Name
Type
Toler-
ance
Power
Well
Default
Blink
Capa-
bility
Glitch
Protection
during
Power-On
Sequence
GPI
Event
Support
Description



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