C200 datasheet(31/82 Pages) INTEL

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Specification Update

Specification Clarifications

14.

SLP_SUS# Clarifications

a. The definition for SLP_SUS# is replaced as follows in table 2-8 Power Management

Interface Signals:

b. SLP_SUS# is added to Table 3-2 Power Plane and States for Output and I/O Signals

for Desktop Configurations.

c. SLP_SUS# is added to Table 3-3. Power Plane and States for Output and I/O Signals

for Mobile Configurations

Name

Type

Description

SLP_SUS#

Deep S4/S5 Indication: When asserted (low), this signal indicates

PCH is in Deep S4/S5 state where internal Sus power is shut off for

enhanced power saving. When deasserted (high), this signal indicates

exit from Deep S4/S5 state and Sus power can be applied to PCH.

If Deep S4/S5 is not supported, then this pin can be left unconnected.

This pin is in the DSW power well.

Signal Name

Power

Plane

During

Reset

Immediately

after Reset

S0/S1

S4/S5

Power Management

SLP_SUS#

DSW

Low

High

Signal Name

Power

Plane

During

Reset

Immediately

after Reset

C-x

states

S0/S1

S4/S5

Power Management

SLP_SUS#

DSW

Low

High

C200 Datasheet(PDF) 31 Page - Intel Corporation

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