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C200 Datasheet(PDF) 17 Page - Intel Corporation

Part # C200
Description  Intel® 6 Series Chipset and Intel® C200 Series Chipset
PDF  82 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

C200 Datasheet(HTML) 17 Page - Intel Corporation

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Specification Update
17
Errata
3.
USB Babble Detected with SW Overscheduling
Problem:
If software violates USB periodic scheduling rules for full-speed isochronous traffic by
overscheduling, the RMH may not handle the error condition properly and return a
completion split with more data than the length expected.
Implication: If the RMH returns more data than expected, the endpoint will detect packet babble for
that transaction and the packet will be dropped. Since overscheduling occurred to
create the error condition, the packet would be dropped regardless of RMH behavior. If
a single isochronous data packet is lost, no perceptible impact to the end user is
expected.
Note:
USB software overscheduling occurs when the amount of data scheduled for a
microframe exceeds the maximum budget. This is an error condition that violates the
USB periodic scheduling rule.
Note:
This failure has only been recreated synthetically with USB software intentionally
overscheduling traffic to hit the error condition.
Workaround: None.
Status:
No Plan to Fix.
4.
USB Full-/low-speed EOP Issue
Problem:
If the EOP of the last packet in a USB Isochronous split transaction (Transaction >189
bytes) is dropped or delayed 3 ms or longer the following may occur:
• If there are no other pending low-speed or full-speed transactions the RMH will not
send SOF, or Keep-Alive. Devices connected to the RMH will interpret this condition
as idle and will enter suspend.
• If there is other pending low-speed or full-speed transactions, the RMH will drop
the isochronous transaction and resume normal operation.
Implication:
• If there are no other transactions pending, the RMH is unaware a device entered
suspend and may starting sending a transaction without waking the device. The
implication is device dependent, but a device may stall and require a reset to
resume functionality.
• If there are other transactions present, only the initial isochronous transaction may
be lost. The loss of a single isochronous transaction may not result in end user
perceptible impact.
Note:
Intel has only observed this failure when using software that does not comply with the
USB specification and violates the hardware isochronous scheduling threshold by
terminating transactions that are already in progress.
Workaround: None.
Status:
No Plan to Fix.
5.
USB PLL Control FSM not Getting Reset on Global Reset
Problem:
Intel® 6 Series Chipset and Intel® C200 Series Chipset USB PLL may not lock if a
Global Reset occurs early during a cold boot sequence.
Implication: USB interface would not be functional an additional cold boot would be necessary to
recover.
Workaround: None.
Status:
No Plan to Fix.



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