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C200 Datasheet(PDF) 30 Page - Intel Corporation |
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C200 Datasheet(HTML) 30 Page - Intel Corporation |
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30 / 82 page ![]() Specification Clarifications 30 Specification Update c. Section 16.1.38 EHCIIR3—EHCI Initialization Register 3 bits 32:22 are changed as shown: d. Section 16.1.39 EHCIIR4—EHCI Initialization Register 4 bits 17 and 15 are changed as shown: 10. PCH Thermal Sensor Temperature Range The following sentence is added at the end of the first paragraph of section 5.21.1: The normal readable temperature range of the PCH thermal sensor is from 53 °C to 134 °C. Note that some parts can read down to 43 °C but this is part to part dependent. 11. Secondary PCI Device Hiding Register Attribute Clarification The following is added to the register summary of section 11.1.20 SPDH—Secondary PCI Device Hiding Register: Bits 3:0 are Read Only on PCI Interface-disabled SKUs; bits 3:0 are Read/Write for PCI Interface-enabled SKUs (see Section 1.3 for full details on SKU definition). 12. GPIO Lock Clarification The following note is added to section 5.15.4 GPIO Registers Lockdown: Note: All other GPIO registers not listed here are not be locked by GLE. 13. GPIO13 Voltage Well The power well for GPIO13 in table 2-24 is changed from Suspend to HDA Suspend. 11 EHCI Initialization Register 2 Field 4 — R/W. BIOS may write to this bit field. 10 EHCI Initialization Register 2 Field 3 — R/W. BIOS may write to this bit field. 9 Reserved 8 EHCI Initialization Register 2 Field 2 — R/W. BIOS may write to this bit field. 7:6 Reserved 5 EHCI Initialization Register 2 Field 1 — R/W. BIOS may write to this bit field. 4:0 Reserved Bit Description Bit Description 23:22 EHCI Initialization Register 3 Field 1 — R/W. BIOS may write to this bit field. Bit Description 17 EHCI Initialization Register 4 Field 2 — R/W. BIOS may write to this bit field. 15 EHCI Initialization Register 4 Field 1 — R/W. BIOS may write to this bit field. |
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