C200 datasheet(19/82 Pages) INTEL

19 / 82 page

Specification Update

Errata

Incorrect Data for FS/LS USB Periodic IN Transaction

Problem:

The Periodic Frame list entry in DRAM for a USB FS or LS Periodic IN transaction may

incorrectly get some of its data from a prior Periodic IN transaction which was initiated

very late into the preceding microframe.

It is considered good practice for software to schedule Periodic Transactions at the start

of a microframe. However Periodic transactions may occur late into a microframe due

to the following cases outlined below:

• Asynchronous transaction starting near the end of the proceeding microframe gets

Asynchronously retried.

Note:

Transactions getting Asynchronous retried would only occur for ill behaved USB device

or USB port with a signal integrity issue

• Or Two Periodic transactions are scheduled by software to occur in the same

microframe and the first needs to push the second Periodic IN transaction to the

end of the microframe boundary.

Implication: The implication will be device, driver or operating system specific.

Note:

This issue has only been observed in a synthetic test environment.

Workaround: None.

Status:

No Plan to Fix.

HDMI* 222 MHz Electrical Compliance Testing Failures

Problem:

HDMI* 222 MHz electrical compliance testing may show eye diagram and jitter test

failures on Intel 6 Series Chipset and Intel C200 Series Chipset.

Implication: No functional or visual failures have been observed by Intel. HDMI electrical compliance

failures may be seen at 222 MHz Deep Color Mode. This issue does not prevent HDMI

with Deep Color Logo certification as no failures have been seen with 74.25 MHz Deep

Color Mode (720P 60 Hz or 1080P 30 Hz) as required HDMI Compliance Test

Specification.

Workaround: None.

Status:

No Plan to Fix.

10.

SATA Signal Voltage Level Violation

Problem:

SATA transmit buffers have been designed to maximize performance and robustness

over a variety of routing scenarios. As a result, the SATA transmit signaling voltage

levels may exceed the maximum motherboard TX connector and device RX connector

voltage specifications as defined in section 7.2.1 of the Serial ATA specification, rev 3.0.

This issue applies to Gen 1 (1.5 Gb/s) and Gen 2 (3.0 Gb/s).

Implication: None known.

Workaround: None.

Status:

No Plan to Fix.

C200 Datasheet(PDF) 19 Page - Intel Corporation

C200 Datasheet(HTML) 19 Page - Intel Corporation

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