IP100A LF
Preliminary Data Sheet
28/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11 Registers and Data Structures
11.1
PHY Registers
The IP100A LF includes a full set of PHY registers which can be accessed through the internal
MDC/MDIO interface. The MAC and PHY, although integrated, act as if they are separate. The PHY
registers must be accessed throught the PhyCtrl register.
11.1.1 Control Register
Class............................. PHY Registers, Control
Access Method ............. Accessed through PhyCtrl register
Register Address .......... 0x00
Default .......................... 0x3100
Width ............................ 16 bits
BIT
BIT NAME
R/W
BIT DESCRIPTION
15
Reset
R/W
1 = Software Reset (self clearing). While the IP100A LF is
resetting, Reset will remain a logic 1 and write attempts to any
PHY Registers are not accepted.
0 = Normal operation.
14
Loopback
R/W
1 = PHY loopback mode. When Loopback is a logic 1, the IP100A
LF will be isolated from the network media. All transmit data
from the MAC will return to the MAC as receive data. Collision
indications are disabled unless Collision Test is a logic 1.
0 = Normal operation.
13
Speed
R/W
1 = 100 Mb/s.
0 = 10 Mb/s.
12
Auto-Negotiation
R/W
1 = Auto-negotiation enabled.
0 = Auto-negotiation disabled.
11
Power Down
R/W
1 = PHY power down. When Power Down is a logic 1, the IP100A
LF PHY will enter Power Down mode. While in Power Down
mode, the IP100A LF PHY will not respond to transmit data, or
received data but will respond to management transactions.
0 = Normal operation.
10
Isolate
R/W
1 = Isolate PHY. When Isolate is a logic 1, the IP100A LF PHY
will be isolated from the MAC. When isolated, the IP100A LF
will not respond to transmit or receive data, but will respond to
management transactions.
0 = Normal operation.
9
Restart
Auto-Negotiation
R/W
1 = Restart auto-negotiation (self clearing). When Restart
Auto-Negotiation is a logic 1, the IP100A LF will restart
Auto-Negotiation, depending on the Auto-Negotiation bit. If
the Auto-Negotiation bit is a logic 0, then Restart
Auto-Negotiation has no effect.
0 = Normal operation.
8
Duplex Mode
R/W
1 = Full duplex.
0 = Half duplex.
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