IP100A LF
Preliminary Data Sheet
59/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.4.14 ReceiveMode
Class............................. LAN I/O Registers, Control and Status
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x5c
Default .......................... 0x00
Width ............................ 8 bits
ReceiveMode sets the receive filter of the IP100A LF.
BIT
BIT NAME
R/W
BIT DESCRIPTION
0
ReceiveUnicast
R/W
Receive Unicast. If ReceiveUnicast is a logic 1, the IP100A LF
receives unicast frames (frames where the DA field matches the
48-bit value in the StationAddress register.
1
ReceiveMulticast
R/W
Receive Multicast. If ReceiveMulticast is a logic 1, the IP100A LF
receives all multicast frames, including broadcast frames.
2
ReceiveBroadcast
R/W
Receive Broadcast. If ReceiveBroadcast is a logic 1, the IP100A
LF receives all broadcast frames.
3
ReceiveAllFrames
R/W
Receive All Frames. If ReceiveAllFrames is a logic 1, the IP100A
LF receives all frames.
4
ReceiveMulticast-
Hash
R/W
Receive Multicast Hash. If ReceiveMulticastHash is a logic 1, the
IP100A LF receives all which pass the hash filtering mechanism
defined in the HashTable register..
5
ReceiveIPMulticast
R/W
Receive IP Multicast. If ReceiveIPMulticast is a logic 1, the
IP100A LF receives all multicast IP datagrams, which are
mapped into Ethernet multicast frames with destination address
of 01:00:5e:xx:xx:xx as defined in RFC 1112 and RFC 1700. The
first 3 bytes require exact match, and the last 3 bytes are ignored.
7..6
Reserved
N/A
Reserved for future use.
11.4.15 RxDMABurstThresh
Class............................. LAN I/O Registers, DMA
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x14
Default .......................... 0x08
Width ............................ 8 bits
RxDMABurstThresh register sets the threshold for receive DMA bus master requests by the IP100A LF
based upon the number of used bytes in the receive FIFO, in units of 32 bytes. When the used space
exceeds the threshold, the IP100A LF may make a receive DMA request on the PCI bus. However, if the
used space exceeds the RxDMAFrameLen field in the current RFD, the IP100A LF will make receive
DMA bus request regardless of whether the used space exceeds the RxDMABurstThresh or not.
RxDMABurstThresh may be overridden by the urgent request mechanism. See the PCI Bus Master
Operation section for information about the relationship between RxDMABurstThresh and
RxDMAUrgentThresh. Any value less than 0x08 is invalid and is interpreted as 0x08.
BIT
BIT NAME
R/W
BIT DESCRIPTION
7..0
RxDMABurstThresh R/W
Receive DMA Burst Threshold. The RxDMABurstThresh is the of
32 byte words which must be present in the receive FIFO prior to
the assertion of a receive DMA bus master request.
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