88 / 97 page
IP100A LF
Preliminary Data Sheet
88/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.7
EEPROM Data Format
Figure 15 summarizes the layout of the EEPROM.
16 BIT WORD
ADDR
OFFSET
StationAddress
0x12
StationAddress
0x11
StationAddress
0x10
0x0F
0x0E
0x0D
0x0C
0x0B
FunctionsCtrl
0x0A
:
:
:
:
Subsystemld
0x03
SubsystemVendorld
0x02
AsicCtrl
0x01
ConfigParm
0x00
FIGURE 15 : IP100A LF EEPROM Field Layout
11.7.1 AsicCtrl
Class............................. EEPROM Data Format
Base Address ............... 0x00, address written to EepromCtrl register
Address Offset .............. 0x01
Access Mode ................ Read Only
Width ............................ 16 bits
AsicCtrl supplies the value for the least significant byte of the AsicCtrl register and the WakeEvent
register.
BIT
BIT NAME
BIT DESCRIPTION
0
LEDFlashSpeed
This bit determines the flashing speed of the LED.
Set to 0 will have LED On and Off ratio of 5 : 35 ms(Fast)
Set to 1 will have LED On and Off ratio of 20 : 60 ms(Slow)
LEDFlashSpeed corresponds to the LEDFlashSpeed bit in the AsicCtrl
register.
1
LED Mode
0: Set LED Mode 0
1: Set LED Mode 1
LED Mode corresponds to the LED Mode bit in the AsicCtrl register.
2
TxLargeEnable
Transmit Large Frames Enable. TxLargeEnable corresponds to the
TxLargeEnable bit in the AsicCtrl register.
3
RxLargeEnable
Receive Large Frames Enable. RxLargeEnable corresponds to the
RxLargeEnable bit in the AsicCtrl register.
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