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IP100A LF
Preliminary Data Sheet
43/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.4
LAN I/O Registers
The host interacts with the IP100A LF mainly through slave registers, which occupy 128 bytes in the host
system’s I/O space, memory space, or both. Generally, registers are referred to as “I/O registers”,
implying that the registers may in fact be mapped and accessed by the host system in memory space.
I/O registers must be accessed with instructions that are no larger than the bit-width of that register.
The IP100A LF LAN I/0 register layout is show in Figure 13.
BYTE 3
BYTE 2
BYTE 1
BYTE 0
ADDR
OFFSET
HashTable[63..32]
0x64
HashTable[31..0]
0x60
PhyCtrl
TxReleaseThresh
ReceiveMode
0x5C
MaxFrameSize
StationAddress[47..32]
0x58
StationAddress[31..0]
0x54
MACCtrl1
MACCtrl0
0x50
IntStatus
IntEnable
0x4C
IntStatusAck
0x48
TxStatus
WakeEvent
0x44
0x40
0x3C
FIFOCtrl
0x38
EepromCtrl
EepromData
0x34
AsicCtrl
0x30
0x2C
0x28
0x24
0x20
0x1C
0x18
RxDMAPollPeriod
RxDMAUrgent-
Thresh
RxDMABurst-
Thresh
0x14
RxDMAListPtr
0x10
RxDMAStatus
0x0C
TxDMAPollPeriod
TxDMAUrgent-
Thresh
TxDMABurst-
Thresh
0x08
TxDMAListPtr
0x04
DMACtrl
0x00
FIGURE 13 : IP100A LF I/O Register Map
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