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IMX93CEC Datasheet(PDF) 104 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 104 Page - NXP Semiconductors |
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104 / 123 page  Table 105. 9 x 9 mm functional contact assignment ...continued Ball name 9 x 9 ball Power group Ball Types Default setting Default modes Default function Status while reset is asserted DRAM_DMI0_A J2 VDDQ_DDR DDR — — — DRAM_DMI1_A R1 VDDQ_DDR DDR — — — DRAM_DQ00_A L2 VDDQ_DDR DDR — — — DRAM_DQ01_A L1 VDDQ_DDR DDR — — — DRAM_DQ02_A K2 VDDQ_DDR DDR — — — DRAM_DQ03_A K1 VDDQ_DDR DDR — — — DRAM_DQ04_A J1 VDDQ_DDR DDR — — — DRAM_DQ05_A H2 VDDQ_DDR DDR — — — DRAM_DQ06_A H1 VDDQ_DDR DDR — — — DRAM_DQ07_A G2 VDDQ_DDR DDR — — — DRAM_DQ08_A T2 VDDQ_DDR DDR — — — DRAM_DQ09_A U2 VDDQ_DDR DDR — — — DRAM_DQ10_A T1 VDDQ_DDR DDR — — — DRAM_DQ11_A R2 VDDQ_DDR DDR — — — DRAM_DQ12_A N1 VDDQ_DDR DDR — — — DRAM_DQ13_A N2 VDDQ_DDR DDR — — — DRAM_DQ14_A M2 VDDQ_DDR DDR — — — DRAM_DQ15_A M1 VDDQ_DDR DDR — — — DRAM_DQS0_C_A K4 VDDQ_DDR — — — — DRAM_DQS0_T_A M4 VDDQ_DDR DDRCLK — — — DRAM_DQS1_C_A P2 VDDQ_DDR — — — — DRAM_DQS1_T_A P1 VDDQ_DDR DDRCLK — — — DRAM_RESET_N F4 VDDQ_DDR DDR — — — Table continues on the next page... NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 104 / 123 |
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