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IMX93CEC Datasheet(PDF) 105 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 105 Page - NXP Semiconductors |
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105 / 123 page ![]() Table 105. 9 x 9 mm functional contact assignment ...continued Ball name 9 x 9 ball Power group Ball Types Default setting Default modes Default function Status while reset is asserted DRAM_ZQ H4 VDDQ_DDR DDR — — — ENET1_MDC T8 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[0] Input with PD ENET1_MDIO U7 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[1] Input with PD ENET1_RD0 U5 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[10] Input with PD ENET1_RD1 T6 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[11] Input with PD ENET1_RD2 U6 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[12] Input with PD ENET1_RD3 T7 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[13] Input with PD ENET1_RX_CTL T5 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[8] Input with PD ENET1_RXC U4 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[9] Input with PD ENET1_TD0 U9 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[5] Input with PD ENET1_TD1 R9 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[4] Input with PD ENET1_TD2 U10 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[3] Input with PD ENET1_TD3 T10 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[2] Input with PD ENET1_TX_CTL T9 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[6] Input with PD ENET1_TXC U8 NVCC_WAKEUP GPIO Alt5 GPIO4.IO[7] Input with PD GPIO_IO00 B16 NVCC_GPIO GPIO Alt0 GPIO2.IO[0] Input with PD GPIO_IO01 B17 NVCC_GPIO GPIO Alt0 GPIO2.IO[1] Input with PD GPIO_IO02 C16 NVCC_GPIO GPIO Alt0 GPIO2.IO[2] Input with PD GPIO_IO03 C17 NVCC_GPIO GPIO Alt0 GPIO2.IO[3] Input with PD GPIO_IO04 D16 NVCC_GPIO GPIO Alt0 GPIO2.IO[4] Input with PD GPIO_IO05 D17 NVCC_GPIO GPIO Alt0 GPIO2.IO[5] Input with PD GPIO_IO06 E16 NVCC_GPIO GPIO Alt0 GPIO2.IO[6] Input with PD GPIO_IO07 E17 NVCC_GPIO GPIO Alt0 GPIO2.IO[7] Input with PD Table continues on the next page... NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 105 / 123 |
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