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IMX93CEC Datasheet(PDF) 118 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 118 Page - NXP Semiconductors |
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118 / 123 page ![]() Table 108. i.MX 93 Data Sheet document revision history...continued Document ID Release date Description • Updated remarks in Table 4. Special signal considerations • Added ADC and TAMPER pin information in Table 5. Unused function strapping recommendations • Updated Table 11. 11 x 11 mm FCPBGA thermal resistance data • Updated NVCC_BBSM_1P8 description in Section 4.1.3, Power architecture • Updated descriptions in Section 4.1.6.1, External clock sources • Updated Figure 7, "Output transition time waveform" • Updated Table 26. GPIO DC parameters and Table 27. Additional leakage parameters • Removed JTAG_TRST information from Section 4.8.3, JTAG timing parameters • Updated Table 63. ENET2 signal mapping and Table 67. ENET QOS signal mapping • Updated footnotes of Table 69 and Table 70 • Updated Table 98. Fuses and associated pins used for boot • Updated power group in 11 x 11 mm supplies contact assignments and functional contact assignments and 9 x 9 mm supplies contact assignments and functional contact assignments Rev. 1 04/2023 • Initial version NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 118 / 123 |
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