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OR4 Datasheet(PDF) 145 Page - Lattice Semiconductor

Part # OR4
Description  ORCASeries 4 FPGAs
PDF  152 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

OR4 Datasheet(HTML) 145 Page - Lattice Semiconductor

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Lattice Semiconductor
145
Data Sheet
May, 2006
ORCA Series 4 FPGAs
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the 
package parasitics. Table 72 lists eight parasitics associated with the ORCA packages. These parasitics represent 
the contributions of all components of a package, which include the bond wires, all internal package routing, and 
the external leads.
Four inductances in nH are listed: LSW and LSL, the self-inductance of the lead; and LMW and LML, the mutual induc-
tance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and 
inductive crosstalk noise. Three capacitances in pF are listed: CM, the mutual capacitance of the lead to the nearest 
neighbor lead; and C1 and C2, the total capacitance of the lead to all other leads (all other leads are assumed to be 
grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading effect of 
the lead. Resistance values are in mΩ.
The parasitic values in
 Table 72 are for the circuit model of bond wire and package lead parasitics. If the mutual 
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be added 
to each of the C1 and C2 capacitors.
Table 72. ORCA Series 4 Package Parasitics
5-3862(C)r2
Figure 60. Package Parasitics
Package Type
LSW
LMW
RW
C1
C2
CM
LSL
LML
352-Pin PBGA
5.00
2.00
220
1.50
1.50
1.50
7—12
3—6
416-Pin PBGAM
3.52
0.80
235
0.40
1.00
0.25
1.5—5.0
0.5—1.3
680-Pin PBGAM
3.80
1.30
250
0.50
1.00
0.30
2.8—5
0.5—1.5
PAD N
LSW
RW
CIRCUIT
BOARD PAD
CM
C1
LSW
RW
LSL
LMW
C2
C1
LML
C2
LSL
PAD N + 1



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