SH7616 datasheet(196/935 Pages) RENESAS

Part #	SH7616

Description	32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

PDF	935 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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196 / 935 page

Section 5 Interrupt Controller (INTC)

Rev. 2.00 Mar 09, 2006 page 170 of 906

REJ09B0292-0200

5.3.13

Vector Number Setting Register G (VCRG)

Vector number setting register G (VCRG) is a 16-bit read/write register that sets the 16-bit timer

pulse unit 0 (TPU0) TCNT0 overflow interrupt vector number (0–127).

VCRG is initialized to H'0000 by a reset. It is not initialized in standby mode.

Bit:

—

TC0VV6 TC0VV5 TC0VV4 TC0VV3 TC0VV2 TC0VV1 TC0VV0

Initial value:

00000000

R/W:

R/W

Bit:

76543210

————————

Initial value:

00000000

R/W:

RRRRRRRR

Bits 15 and 7 to 0—Reserved: These bits are always read as 0. The write value should always be

Bits 14 to 8—16-Bit Timer pulse unit 0 (TPU0) TCNT0 Overflow Interrupt Vector Number 6 to 0

(TC0VV6–TV0VV0): These bits set the vector number for the 16-bit timer pulse unit 0 (TPU0)

TCNT0 overflow interrupt. There are seven bits, so the value can be set between 0 and 127.

SH7616 Datasheet(PDF) 196 Page - Renesas Technology Corp