SH7616 datasheet(195/935 Pages) RENESAS

195 / 935 page

Section 5 Interrupt Controller (INTC)

Rev. 2.00 Mar 09, 2006 page 169 of 906

REJ09B0292-0200

5.3.12

Vector Number Setting Register F (VCRF)

Vector number setting register F (VCRF) is a 16-bit read/write register that sets the 16-bit timer

pulse unit 0 (TPU0) TGR0C and TGR0D input capture/compare match interrupt vector numbers

(0–127).

VCRF is initialized to H'0000 by a reset. It is not initialized in standby mode.

Bit:

—

TG0CV6 TG0CV5 TG0CV4 TG0CV3 TG0CV2 TG0CV1 TG0CV0

Initial value:

00000000

R/W:

R/W

Bit:

76543210

—

TG0DV6 TG0DV5 TG0DV4 TG0DV3 TG0DV2 TG0DV1 TG0DV0

Initial value:

00000000

R/W:

R/W

Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.

Bits 14 to 8—16-Bit Timer pulse unit 0 (TPU0) TGR0C Input Capture/Compare Match Interrupt

Vector Number 6 to 0 (TG0CV6–TG0CV0): These bits set the vector number for the 16-bit timer

pulse unit 0 (TPU0) TGR0C input capture/compare match interrupt. There are seven bits, so the

value can be set between 0 and 127.

Bits 6 to 0—16-Bit Timer pulse unit 0 (TPU0) TGR0D Input Capture/Compare Match Interrupt

Vector Number 6 to 0 (TG0DV6–TG0DV0): These bits set the vector number for the 16-bit timer

pulse unit 0 (TPU0) TGR0D input capture/compare match interrupt. There are seven bits, so the

value can be set between 0 and 127.

SH7616 Datasheet(PDF) 195 Page - Renesas Technology Corp