HD6433713 datasheet(136/324 Pages) RENESAS

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7.6.3 Pin Functions

Table 7-18 shows the port 6 pin functions.

Table 7-18 Port 6 Pin Functions

Pin Functions and Selection Method

P67/FD7/FS0 to

After designation of the digit pins and segment pins to be used in bits DR3 to

P60/FD0/FS7

DR0 of the VFD digit control register (VFDR), bits SR4 to SR0 of the VFD

segment control register (VFSR), and bits DBR3 to DBR0 of the digit beginning

is started. During key scan intervals, pins designated for digit or segment

output can be used by the CPU as general-purpose ports. Even while the VFD

controller/driver is operating, it is possible to switch digit pins or segment pins

to general-purpose ports by writing 0 in the VFLAG bit of VFSR.

VFLAG

Pin function

Pins P67 to P60 are all

Pins are designated as digit

general-purpose I/O pins.

output pins,* segment

output pins,* or general

I/O pins by bits DR3 to DR0,

SR4 to SR0, and DBR3 to

DBR0.

Note: * When a pin functioning as a digit output pin or segment output pin is

read, the value of the corresponding bit in PDR6 is read.

7.6.4 Pin States

Table 7-19 shows the port 6 pin states in each operating mode.

Table 7-19 Port 6 Pin States

Pins

Reset

Sleep

Standby

Watch

Subactive

Active

P67/FD7/

High

Normal

FS0 to

impedance or state

impedance or impedance or impedance or operation

P60/FD0/

pulled down

retained

pulled down

FS7

125

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