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HD6433713 Datasheet(PDF) 152 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 152 Page - Renesas Technology Corp |
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152 / 324 page ![]() 2. Timer counter A (TCA) TCA is an 8-bit read-only up-counter, which is incremented by internal clock input. The clock source for input to this counter is selected by bits TMA3 to TMA0 in timer mode register A (TMA). The TCA value can be read by the CPU at any time. TCA is cleared by setting bits TMA3 and TMA2 of TMA to 1. When TCA overflows, the IRRTA bit in interrupt request register 2 (IRR2) is set to 1. Upon reset, TCA is initialized to H'00. 8.2.3 Timer Operation Timer A is an 8-bit timer which can be used either as an interval timer or, if a 32.768 kHz crystal oscillator is connected, as a real-time clock time base. 1. Interval timer operation When bit TMA3 in timer mode register A (TMA) is cleared to 0, timer A functions as an 8-bit interval timer. Upon reset, TCA is cleared to H'00 and bit TMA3 is cleared to 0, so up-counting and interval timing resume immediately after the reset. The clock input to timer A is selected by bits TMA2 to TMA0 in TMA; any of eight internal clock signals output by prescaler S can be selected. After the count value in TCA reaches H'FF, the next clock signal input causes timer A to overflow, setting bit IRRTA to 1 in interrupt request register 2 (IRR2). If IENTA = 1 in interrupt enable register 2 (IENR2), a CPU interrupt is requested.* At overflow, TCA returns to H'00 and starts counting up again. In this mode timer A functions as an interval timer that generates an overflow output at intervals of 256 input clock pulses. Note: * For details on interrupts, see 3.2.2, Interrupts. Bit Initial value Read/Write 7 TCA7 0 R 6 TCA6 0 R 5 TCA5 0 R 4 TCA4 0 R 3 TCA3 0 R 0 TCA0 0 R 2 TCA2 0 R 1 TCA1 0 R 141 |
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