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HD6433713 Datasheet(PDF) 197 Page - Renesas Technology Corp

Part # HD6433713
Description  single-chip microcontrollers
PDF  324 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6433713 Datasheet(HTML) 197 Page - Renesas Technology Corp

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In simultaneous data transmit/receive, the transmit operation and receive operation described in
10.3.4 sections 2 and 3 take place at the same time. See those sections for further details.
During a transmit/receive operation, a dummy read of SMR1 will result in a transmit/receive error,
setting bit IRRS1 in IRR3 to 1.
10.3.5 SCI1 State Transitions
SCI1 has three internal states, as shown in figure 10-3.
In the serial start pending state, the internal state of the serial communication interface is
initialized. In this state, the serial communication interface does not operate even if a serial clock
signal is input. Executing a dummy read of SMR1 changes this state to the serial clock pending
state.
In the serial clock pending state, when a serial clock signal is input the octal/hexadecimal counter
starts counting up and the serial data register starts shifting, entering the transfer state. If
continuous clock output mode has been selected, however, SCI1 outputs the clock signal
continuously and does not enter the transfer state.
In the transfer state, when 8 or 16 transfer clock cycles are input, or if an SMR1 dummy read is
executed, the octal/hexadecimal counter is reset to H'0, and SCI1 enters the serial clock pending
state. Writing to SMR1 in the transfer state will reset the octal/hexadecimal counter to H'0 and
change to the serial start pending state. In transitions from the transfer state to another state, the
resetting of the octal/hexadecimal counter to H'0 sets bit IRRS1 in IRR3 to 1.
If an internal clock source is selected, a dummy read of SMR1 starts output of the serial clock,
which stops after 8 or 16 clock output cycles.
After writing to SMR1 in the serial clock pending state or transfer state, it is necessary to write to
SMR1 again in order to initialize the initial state of the serial communication interface. Writing to
SMR1 changes the state to the serial start pending state.
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