HD6433713 datasheet(193/324 Pages) RENESAS

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10.3 Operation

10.3.1 Overview

SCI1 sends and receives data in synchronization with clock pulses.

SCI1 operation modes are set by bits 6 to 4 of serial mode register 1 (SMR1) and bits 3 to 1 of

port mode register 2 (PMR2) in combination, as shown in table 10-3.

Table 10-3 SCI1 Operation Mode Setting

SMR1

PMR2

SMR16

SMR15

SMR14

PMR23

PMR22

PMR21

Operation Mode

***

Serial communication disabled

00001

Continuous clock output mode

8-bit transmit mode

8-bit receive mode

8-bit transmit/receive mode

16-bit transmit mode

16-bit receive mode

16-bit transmit/receive mode

Note: * Don’t care.

SCI1 consists of SMR1, serial data register U1 (SDRU1), serial data register L1 (SDRL1), serial

port register 1 (SPR1), an octal/hexadecimal counter, and a multiplexer. (See figure 10-1.)

Pin SCK1 and the serial clock are controlled by writing data to SMR1.

SDRU1 and SDRL1 are used to write transmit data and to hold received data; these registers can

be written and read by software. Data in these registers is shifted in synchronization with the

serial clock, for input and output at pins SI1 and SO1.

SCI1 operation starts with a dummy read of SMR1. The octal/hexadecimal counter is cleared to

H'0 by this dummy read, and starts counting anew from the falling edge of the serial clock (pin

SCK1), being incremented by 1 at each rising edge of the serial clock. If 8 or 16 serial clock

cycles are input and the counter overflows, or if data transmission or reception is aborted, the

octal/hexadecimal counter is cleared to H'0. At the same time bit IRRS1 in interrupt request

For more details on interrupts, see 3.2.2, Interrupts.

SMR15, SMR14

set to value other

than 00

SMR15, SMR14

set to value other

than 00

182

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