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HD6433713 Datasheet(PDF) 190 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 190 Page - Renesas Technology Corp |
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190 / 324 page ![]() 10.2.3 Serial Data Register L1 (SDRL1) Note: * Not fixed SDRL1 is an 8-bit read/write register. It is used as the data register in 8-bit transfer, and as the data register for the lower 8 bits in 16-bit transfer (SDRU1 is used for the upper 8 bits). In 8-bit transfer, data written to SDRL1 is output from pin SO1 starting from the least significant bit (LSB), in synchronization with the falling edge of the serial clock. This data is then replaced by LSB-first data input at pin SI1, synchronized with the rising edge of the serial clock. In this way data is shifted in the direction from the most significant bit (MSB) toward the LSB. In 16-bit transfer, operation is the same as for 8-bit transfer, except that input data is fed in via SDRU1. SDRL1 must be written or read only after data transmission or reception is complete. If this register is read or written while a data transfer is in progress, the data contents are not guaranteed. The SDRL1 value upon reset is not fixed. 10.2.4 Serial Port Register 1 (SPR1) Note: * Not fixed SPR1 is an 8-bit read/write register, bit 7 of which is connected to the last output stage of SDRL1. Bit Initial value Read/Write 7 SDRL17 R/W 6 SDRL16 R/W 5 SDRL15 R/W 4 SDRL14 R/W 3 SDRL13 R/W 0 SDRL10 R/W 2 SDRL12 R/W 1 SDRL11 R/W * *** ** ** Bit Initial value Read/Write 7 R/W 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 — 1 — 2 — 1 — 1 — 1 — SO1 LAST BIT * 179 |
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