HD6433713 datasheet(191/324 Pages) RENESAS

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Bit 7: Extended data bit (SO1 LAST BIT)

Bit 7 holds the last bit of transmitted data after transmission ends.

Output from pin SO1 can be altered by software by modifying this bit either before or after

transmission.

If this bit is written during data transmission, the data contents are not guaranteed.

Bit 7

SO1 LAST BIT

Description

Output from pin SO1 is low.

(initial value)

Output from pin SO1 is high.

Bits 6 to 0: Reserved bits

Bits 6 to 0 are reserved: they always read 1, and cannot be modified.

10.2.5 Port Mode Register 2 (PMR2)

PMR2 is an 8-bit read/write register, for switching the port 9 pin functions. Bits 3 to 1, in

combination with SMR1, set the SCI1 operation mode.

Upon reset, PMR2 is initialized to H'00.

Bits 3 to 1 are explained here. For bits 7 to 4 and bit 0, see 7.10.2 (1), Port Mode Register 2

(PMR2).

Bit 3: Pin P93/SO1 function switch (SO1)

Bit 3 selects whether pin P93/SO1 functions as a P93 input/output pin or as the SO1 output pin.

Bit 3

SO1

Description

Pin P93/SO1 functions as P93 I/O pin.

(initial value)

Pin P93/SO1 functions as SO1 output pin. Setting bit SCK1 to 1 and

clearing bit SI1 to 0 puts SCI1 in transmit mode.

Bit

Initial value

Read/Write

R/W

SO2

R/W

SI2

R/W

SCK2

R/W

SO1

R/W

PWM

R/W

SI1

R/W

SCK1

R/W

UP/

DOWN

180

HD6433713 Datasheet(PDF) 191 Page - Renesas Technology Corp

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