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HC210 Datasheet(PDF) 216 Page - Altera Corporation |
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HC210 Datasheet(HTML) 216 Page - Altera Corporation |
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216 / 228 page ![]() 8–28 Altera Corporation September 2008 HardCopy Series Handbook, Volume 1 Figure 8–3. HC210 and HC220 PLL Locations HC230 device fast PLLs 1, 2, 7, and 8 are located in the logic array, next to the device’s left high-speed IOEs. HC230 device enhanced PLLs 5, 6, 11, and 12 are also located in the logic array, next to the top and bottom memory interface IOEs. FPLL10CLK FPLL9CLK CLK[8..11] FPLL7CLK FPLL8CLK CLK[3..0] CLK[7..4] CLK[15..12] Bank 4 Memory Interface IOEs PLL 5 Bank 9 Bank 7 General Purpose IOEs Bank 8 General Purpose IOEs PLL 6 Bank 10 Bank 3 Memory Interface IOEs Bank 2 High-Speed IOEs Bank 1 High-Speed IOEs Bank 5 General-Purpose IOEs Bank 6 General-Purpose IOEs PLL 1 PLL 2 |
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