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DP8344 Datasheet(PDF) 106 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8344
Description  Biphase Communications Processor?좦CP
PDF  184 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8344 Datasheet(HTML) 106 Page - National Semiconductor (TI)

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50 Device Specifications (Continued)
TABLE 5-10 Control Pin Timing (Note 1)
Symbol
ID
Parameter
Formula
Min
Max
Units
tW-RST
1
RESET Low
5Ta
0ns
tPD-RST-ICLK
2
RESET Rising to ICLK Rising
4Ta
0ns
tSU-ALE-WT
3
WAIT Low after ALE High to Extend Cycle
(MAX(nDW nIWb1)a1)Tab21
ns
tH-WT-ALE
4
WAIT Rising after ALE Falling (Note 2)
0
ns
(MAX(nDW nIWb1)a1)Tab28
ns
tPD-WT-RDWR
5
WAIT Rising to READ or WRITE Rising
TaTLab22
ns
2TaTLa
2ns
tSU-RRW-RST
6
REM-RD REM-WR Low to RESET
15
ns
Rising for BCP to Start
tH-RST-RRW
7
REM-RD REM-WR Low after RESET
5ns
Rising for BCP to Start
tSU-LK-ICLK
8
LOCK Low before ICLK High (Note 3)
TLa
19
ns
tPD-LK-ALE
9
LOCK High to ALE Low
Tab2ns
3Ta
20
ns
tSU-WT-ICLK
10
WAIT Low after ICLK Rising to Extend Cycle
(MAX(nDW nIWb1))TaTHa
b
22
ns
(Note 4)
tH-WT-ICLK
11
WAIT High after ICLK Rising (Notes 2 4)
(MAX(nDW nIWb1))TaTHa
2ns
(MAX(nDW nIWb1)a1)TaTHab20
ns
tH-LK-ICLK
12
LOCK Rising after ICLK High
THa
2ns
tPD-AD-ALE
13
AD to ALE Falling after LOCK Rising
Tab33
ns
tSU-WT-ALEf
14
WAIT Low before ALE Falling to Extend Cycle
23
ns
Note 1
All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2
The maximum value for this parameter is the lastest WAIT can be removed without adding an additional T-state The formula assumes a minimum
externally generated wait of one T-state
Note 3
If tSU-LK-ICLK is not met the maximum time from LOCK low till no more local accesses is (MAX(nDW nIWb1)a3)T
Note 4
The formula(s) apply to a 2 T-state instruction For a 3 T-state instruction add one T-state for a 4 T-state instruction add two T-states
106



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