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DP8344 Datasheet(PDF) 126 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8344
Description  Biphase Communications Processor?좦CP
PDF  184 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8344 Datasheet(HTML) 126 Page - National Semiconductor (TI)

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50 Device Specifications (Continued)
TABLE 5-26 Remote Rest Time (Note 1)
Symbol
ID
Parameter
Formula
Min
Max
Units
tSU-BR-RR-CO
1
REM-RD Rising before CLK-OUT Rising
19
ns
(Buffered Read Mode)
tH-BR
2
CLK-OUT Rising after REM-RD Rising to REM-RD
TaTHa
10
ns
or REM-WR Falling (Buffered Read Mode)
tSU-LR-RR-CO
3
REM-RD Rising before CLK-OUT Rising
16
ns
(Latched Read Mode)
tH-LR
4
CLK-OUT Rising after REM-RD Rising to REM-RD
TaTHa
10
ns
or REM-WR Falling (Latched Read Mode)
tSU-SBW-RW-CO
5
REM-WR Rising before CLK-OUT Rising
22
ns
(Slow Buffered Write Mode)
tH-SBW
6
CLK-OUT Rising after REM-WR Rising to REM-RD or
TaTHa
10
ns
REM-WR Falling (Slow Buffered Write Mode)
tSU-FBW-RW-CO
7
REM-WR Rising before CLK-OUT Rising
22
ns
(Fast Buffered Write Mode)
tH-FBW
8
CLK-OUT Rising after REM-WR Rising to REM-RD or
TaTHa
10
ns
REM-WR Falling (Fast Buffered Write Mode)
tSU-LW-RW-CO
9
REM-WR Rising before CLK-OUT Rising
20
ns
(Latched Write Mode)
tH-LW
10
CLK-OUT Rising after REM-WR Rising to REM-RD
10
ns
or REM-WR Falling (Latched Write Mode)
tSU-LW-RWR-COa
11
REM-WR orREM-RD Falling to CLK-OUT Falling
THa
7ns
(Latched Write Mode) (Note 2)
tSU-LW-RWR-COb
12
CLK-OUT Rising to REM-WR or REM-RD rising
8ns
(Latched Write Mode) (Note 2)
tPD-CO-WP
13
CLK-OUT rising to WR-PEND Rising
b
121
ns
Note 1
All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2
Both specifications refer to the CLK-OUT falling edge after WR-PEND rising See Section 426 RIAS remote rest time
126



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