DP8344 datasheet(137/184 Pages) NSC

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60 Reference Section (Continued)

ADD

Add Immediate

Syntax

ADD

n rsd

immediate limited register

Affected Flags

N Z C V

Description

Adds the immediate value n to the register rsd and places

the result back into the register rsd Note that only the ac-

tive registers R0 – R15 may be specified for rsd The value of

n is limited to 8 bits (unsigned range 0 to 255 signed

range a127 to b128)

Example

Add the constant b3 to register 10

ADD

3 R10

R10 a (b3)

xR10

Instruction Format

0000

Opcode

rsd

T-States

Bus Timing

Figure 6-1

Operation

rsd a n

xrsd

ADDA

Add with Accumulator

Syntax

ADDA

Rs Rd

ADDA

mIr

Affected Flags

N Z C V

Description

Adds the source register Rs to the active accumulator and

places the result into the destination specified The destina-

tion may be either a register Rd or data memory via an

index register mode mIr Note that register bank selection

determines which accumulator is active

Example

In the first example the value 4 is placed into the currently

active accumulator that accumulator is added to the con-

tents of register 20 and then the result is placed into regis-

ter 21

MOVE

4 A

Place constant into accum

ADDA

R20 R21

R20 a accum

xR21

In the second example the alternate accumulator of regis-

ter bank B is selected and then added to register 20 The

result is placed into the data memory pointed to by the index

EXX

0 1

Select alt accumulator

ADDA

R20

IZa

R20 a accum

xdata mem

and increment data pointer

Instruction Format

ADDA

Rs Rd

111000

Opcode

ADDA

mIr

TLF9336 – 6

T-states

ADDA

Rs Rd

ADDA

mIr

Bus Timing

ADDA

Rs Rd

Figure 6-1

ADDA

mIr

Figure 6-6

Operation

ADDA

Rs Rd

Rs a accumulator

xRd

ADDA

mIr

Rs a accumulator

xdata memory

AND

And Immediate

Syntax

AND

n rsd

immediate limited register

Affected Flags

N Z

Description

Logically ANDs the immediate value n to the register rsd

and places the result back into the register rsd Note that

only the active registers R0 – R15 may be specified for rsd

The value of n is 8 bits wide

Example

Unmask both the Transmitter and Receiver interrupts via

the Interrupt Control Register

ICR

R2 Leave the other

interrupts unaffected

EXX

select main register banks

AND

11111100BR2

unmask transmitter and

receiver interrupts

Instruction Format

0100

Opcode

rsd

T-states

Bus Timing

Figure 6-1

Operation

rsd

AND

xrsd

137

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