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DP8344 Datasheet(PDF) 136 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 136 Page - National Semiconductor (TI) |
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136 / 184 page ![]() 60 Reference Section (Continued) TLF9336 – 26 FIGURE 6-7 InstructionData Memory Bus Timing for Data Memory Write (No Instruction or Data Memory Wait States CPU Running at Full Speed CCS e 0) ADCA Add with Carry and Accumulator Syntax ADCA Rs Rd register register ADCA Rs mIr register indexed Affected Flags N Z C V Description Adds the source register Rs the active accumulator and the carry flag together placing the result into the destination specified The destination may be either a register Rd or data memory via an index register mode mIr Note that register bank selection determines which accumulator is ac- tive Example Add the constant 109 to the index register IW (which is 16 bits wide) SUBA A A Clear the accumulator ADD 109 R12 Add 109 to low byte of IW ADCA R13 R13 Add carry to high byte of IW Instruction Format ADCA Rs Rd 111001 Opcode Rd Rs 15 9 4 0 ADCA Rs mIr TLF9336 – 5 T-states ADCA Rs Rd 2 ADCA Rs mIr 3 Bus Timing ADCA Rs Rd Figure 6-1 ADCA Rs mIr Figure 6-6 Operation ADCA Rs Rd Rs a accumulator a carry bit xRd ADCA Rs mIr Rs a accumulator a carry bit xdata memory 136 |
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