SEC1210 datasheet(28/218 Pages) MICROCHIP

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SEC1110/SEC1210

DS00001561C-page 28

 2013 - 2016 Microchip Technology Inc.

9.1.2

B REGISTER – B

9.1.3

PROGRAM STATUS WORD REGISTER – PSW

The PSW Register contains status bits that reflect the current state of the CPU.

The state of the rs1 and rs0 bits selects the working register bank as outlined in Table 9-5.

TABLE 9-3:

B REGISTER

(SFR 0XF0 - RESET=0X00)

BIT

NAME

R/W

DESCRIPTION

7:0

R/W

Used during multiplying and division instructions. It can also be used

as a scratch-pad register to hold temporary data.

Note:

The parity bit can only be modified by hardware by the state of ACC Register.

TABLE 9-4:

PROGRAM STATUS WORD REGISTER

PSW

(SFR 0XD0 - RESET=0X00)

STACK POINTER

BIT

NAME

R/W

DESCRIPTION

R/W

Carry flag:

The carry bit in arithmetic operations and the accumulator for Boolean

operations.

R/W

Auxiliary Carry Flag:

Set if there is a carry-out from 3rd bit of the accumulator in BCD

operations.

R/W

General Purpose Flag 0:

Available for general use.

rs1

R/W

Used to select the working register bank.

rs0

R/W

Used to select the working register bank.

R/W

Overflow Flag:

Set in case of overflow in accumulator during arithmetic operations.

R/W

General Purpose Flag 1:

Available for general use.

Parity Flag:

Reflects the number of 1s in the accumulator.

: If the accumulator contains an odd number of 1s

: If the accumulator contains an even number of 1s

TABLE 9-5:

rs1

rs0

SELECTED REGISTER BANK

LOCATION

Bank 0

(00H – 07H)

Bank 1

(08H – 0FH)

Bank 2

(10H – 17H)

Bank 3

(18H – 1FH)

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