SEC1210 datasheet(49/218 Pages) MICROCHIP

49 / 218 page

 2013 - 2016 Microchip Technology Inc.

DS00001561C-page 49

SEC1110/SEC1210

One of two protocols is selected, defined by a parameter T in the ATR message, and potentially negotiated in a PPS

exchange. The protocol T=0 is character-oriented, with parity error detection and re-transmission on a character-by-

character basis. The protocol T=1 is block-oriented, with an error-free link layer based on block re-transmission, resem-

bling the X.25 communication standard. In the T=1 protocol, both individual character parity and a block check field are

used to detect errors.

The SEC1110 and SEC1210 SC_FIFO is deep enough to hold an entire message of maximum length (259 bytes in

SEC1110/SEC1210 and 261 bytes in SEC1110/SEC1210). It transmits data, pre-loaded into the SC_FIFO, when the

transmit control bit is set by software. It immediately turns around, enabling the Receiver to put data received back into

the SC_FIFO. The SC_FIFO Threshold Interrupt is triggered by received data only, though a separate interrupt is avail-

able to signal when the transmit phase has ended. The hardware has significant knowledge of the protocol being imple-

mented, and can be set up to filter out bytes that would lead to a message longer than the SC_FIFO depth.

After deactivation of the ICC, it is required to perform a block reset to the smart clock block using SC1_RESET or

SC2_RESET, or initialize all the registers to desired values.

10.4

Character Framing

The SEC1110 and SEC1210 meets the requirements for a character frame as defined by ISO 7816-3. The T=0 and T=1

protocol differ in the minimum amount of Guard Time: 2 etus for T=0, and 1 etu for T=1, which does not require a char-

acter-by-character parity error response.

Character parity is checked as each byte is received by hardware. If a parity error is detected when a byte is received,

the parity error status bit will be set. This status bit can be polled by software, or it can be programmed to generate an

interrupt and/or to deactivate the card in hardware. If character repetition is enabled (used in the T=0 protocol) the

SEC1110 and SEC1210 will pull the SCx_IO line low following a received parity error, for the duration of 1 etu as defined

by ISO 7816-3. If the card signals receipt with a parity error while the SEC1110 and SEC1210 is transmitting, it will repeat

the character up to 4 additional times. Whether transmitting or receiving, failure after 5 transmissions of the same char-

acter will cause a Parity Error Interrupt and/or hardware deactivation of the ICC.

Note:

Software should not try to initiate a RESYNCH until the transaction has completed, because the card may

still be trying to send data to the IFD. Timeout timers and an Activity Detection bit are provided to assist

software in this determination, in case of an error.

FIGURE 10-4:

T=0 MODE CHARACTER TRANSMISSION AND REPETITION DIAGRAM

Note:

Timing is measured in etus. 1 etu = time to transmit 1 bit. The default etu is equal to 372/f, where f is the

clock frequency.

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