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SEC1210 Datasheet(PDF) 71 Page - Microchip Technology |
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SEC1210 Datasheet(HTML) 71 Page - Microchip Technology |
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71 / 218 page ![]() 2013 - 2016 Microchip Technology Inc. DS00001561C-page 71 SEC1110/SEC1210 3 FAST_OPEN_DRAIN R/W If this bit is set, and the Mode is output, the signal is driven low when the data is 0. When the data transitions to 1, it is actively driven high for one system clock cycle before being tri-stated. 2 OPEN_DRAIN R/W If this bit is set, and the Mode is output, the SCx_C4 output is driven open drain; 0 are driven, 1 are tri-stated. 1 PULL_UP_EN R/W When set, it enables the pull-up to this pin. 0 PULL_DN_EN R/W When set, it enables the pull-down to this pin. (0X0098)- RESET=0X00) 7:2 Reserved R Always read as 0 1 FCB_IN R This bit reflects the state of the SCx_C4 pin when select muxes are set to Smart Card Mode. Synchronous or asynchronous Mode does not matter. 0 FCB_OUT R/W This bit reflects the state of the SCx_C4 pin when select muxes are set to Smart synchronous Mode. Synchronous or asynchronous Mode does not matter. TABLE 10-10: SMART CARD SYNC SPU CONTROL REGISTER SC_SYNC_SPU (0X009D- RESET=0X00) SMART CARD SPU CONTROL REGISTER BIT NAME R/W DESCRIPTION 7:6 Reserved R Always read as 0 5 INPUT_EN R/W 1 : Input is enabled 0 : Input is disabled 4 OUTPUT_EN R/W 1 : Output is enabled 0 : Output is disabled 3 FAST_OPEN_DRAIN R/W If this bit is set, and the Mode is output, the signal is driven low when the data is 0. When the data transitions to 1, it is actively driven high for one system clock cycle before being tri-stated. 2 OPEN_DRAIN R/W If this bit is set, and the Mode is output, the SCx_C8 output is driven open drain; 0 are driven, 1 are tri-stated. 1 PULL_UP_EN R/W When set, it enables the pull-up to the SCx_C8 pin. 0 PULL_DN_EN R/W When set, it enables the pull-down to the SCx_C8 pin. (0X009C- RESET=0X00) 7:2 Reserved R Always read as 0 1 SPU_IN R This bit reflects the state of the SCx_SPU pin when select muxes are set to Smart Card Mode. Synchronous or asynchronous Mode does not matter. 0 SPU_OUT R/W This bit reflects the state of the SCx_SPU pin when select muxes are set to Smart Card Mode. Synchronous or asynchronous Mode does not matter. TABLE 10-9: SMART CARD SYNC FCB CONTROL REGISTER (CONTINUED) SC_SYNC_FCB (0X0099)- RESET=0X00) SMART CARD FCB CONTROL REGISTER BIT NAME R/W DESCRIPTION |
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