SEC1210 datasheet(90/218 Pages) MICROCHIP

90 / 218 page

SEC1110/SEC1210

DS00001561C-page 90

 2013 - 2016 Microchip Technology Inc.

TABLE 10-51: SMART CARD INS CODE REGISTER

SC_FINS

(0X002D- RESET=0X00)

SMART CARD FILTER STATE MACHINE INS CODE REGISTER

BIT

NAME

R/W

DESCRIPTION

7:0

INS

R/W

This register holds the INS byte for the current T=0 exchange, so that

the T=0 Filter state machines can recognize the INS and INS

Procedure Bytes

TABLE 10-52: SMART CARD DEBOUNCE REGISTER

SC_TEST1

(0X0030, - RESET=0X14)

SMART CARD TEST REGISTERS

BIT

NAME

R/W

DESCRIPTION

7:0

DEBOUNCE_MAX

R/W

This register indicates the debounce counter value for the

SCx_PRSNT_N signal, in 1 ms resolution. If a value of zero is written,

then the debounce logic is avoided, and the SCx_PRSNT_N signal is

sampled directly.

The DEBOUNCE_CLK_EN and DEBOUNCE_FREQ bits in

OSC48_SETTLE_CLKS Register must be enabled for the debouncing

to work.

TABLE 10-53: SMART CARD DEBOUNCE REGISTER

SC_TEST2

(0X0031, - RESET=0X1F)

SMART CARD TEST REGISTERS

BIT

NAME

R/W

DESCRIPTION

7:2

START_WIDTH_TOL[7:2]

R/W

After the leading edge of the start bit, a check is done for a low on

the SCx_IO line, for the sample number indicated by this start bit

tolerance register before the next bit.

If SCx_IO is not low at start bit tolerance sample before the next bit,

that start bit will be invalidated and the Receiver will search for next

start byte.

This width check if violated, will likely result in wrong data received

with a parity error or TMO.

OEN_EXT

When this bit is 0, it disables the OEN extension feature. The Output

enable for the SCx_IO pad is driven for one internal Smart Card clock,

at the end of transmit, and at the end of parity error signaling. This

setting may cause insufficient time, for the SCx_IO pad to switch from

to 1, before tristating and enabling the pull-up, during high Smart

Card block frequencies.

When this bit is 1 (default), it indicates that the Output enable

extension for SCx_IO is enabled. This setting ensures that a 0 to 1

transition occurs on the pad, and then the pad is tristated and pull-up

enabled on SCx_IO.

The OEN_CLKS field indicates the OEN extension time.

START_BIT_NEG_EDGE

When this bit is 0, it indicates the detection of start bit (after a parity

error is signaled) occurs when a negative edge is seen on SCx_IO.

When this bit is 1 (default), it indicates the detection of start bit (after

a parity error is signaled) occurs when a 0 level is seen on SCx_IO.

This setting may cause a parity error signaling to be wrongly identified

as the next start bit when the Smart Card block runs internally at high

frequencies.

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