SEC1210 datasheet(41/218 Pages) MICROCHIP

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DS00001561C-page 41

SEC1110/SEC1210

9.1.22

POWER CONTROL REGISTER – PCON

9.1.22.1

pmw

The MOVX instructions perform one of two actions depending on the state of pmw bit (PCON.4). The pmw bit selects the

standard or advanced behavior of the microcontroller during execution of MOVX instruction.

When the pmw is cleared or after reset, MOVX instructions allow read/write access to external data memory space. The

software can set the pmw bit to enable access to program memory space. Once pmw is set, MOVX data memory instruc-

tions become MOVX program memory instructions with 8 or 16-bit addressing modes. The software clears pmw to

switch back to normal MOVX behavior.

Setting or clearing pmw does not influence the execution of MOVC instruction and it does not change the behavior of

program memory reading.

9.1.22.2

CPU_IDLE

When the CPU_IDLE Mode is invoked, the ISR and other peripherals are clocked normally and interrupts are generated

normally. Therefore the irq signal coming from the ISR module can directly wake-up the CPU from CPU_IDLE Mode.

TABLE 9-31:

PRIORITY LEVELS

IP1.X

IP0.X

PRIORITY LEVEL

Level 0 (lowest)

Level 1

Level 2

Level 3 (highest)

Note:

X represents the priority group

TABLE 9-32:

POWER CONTROL REGISTER

PCON

(SFR 0X87 - RESET=0X08)

POWER CONTROL REGISTER

BIT

NAME

R/W

DESCRIPTION

smod

R/W

This bit is not used.

wdt_tm

R/W

Watchdog Timer Test Mode Flag:

When set to 1, the fclk/12 divider at the input of the watchdog timer

is skipped.

isr_tm

R/W

Interrupt Service Routine Test Mode Flag:

When set to 1, the interrupt vectors assigned to Timer 0 and 1, Serial

Port 0 and 1, and SPI interfaces can be triggered only with the use

of external inputs of the core.

pmw

R/W

Program Memory Write Mode:

Setting this bit enables the Program Memory Write Mode.

p2sel

R/W

This bit is not used.

gf0

R/W

General Purpose Flag

stop

R/W

STOP Mode Control:

Setting this bit activates the STOP Mode. This bit is always read as 0.

idle

R/W

Idle Mode Control:

Setting this bit activates the IDLE Mode. This bit is always read as 0.

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