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FDC37M607 Datasheet(PDF) 108 Page - SMSC Corporation |
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FDC37M607 Datasheet(HTML) 108 Page - SMSC Corporation |
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108 / 182 page ![]() 108 SERIAL IRQ The FDC37M60x will support the serial interrupt to transmit interrupt information to the host system. The serial interrupt scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0. Timing Diagrams For IRQSER Cycle PCICLK = 33 MHz_IN pin IRQSER = SIRQ pin A) Start Frame timing with source sampled a low pulse on IRQ1 R T S R T S IRQSER PCICLK Host Controller IRQ1 IRQ1 Drive Source R T None IRQ0 FRAME IRQ1 FRAME S R T IRQ2 FRAME None START START FRAME H SL or H 1 H=Host Control, R=Recovery, SL=Slave Control, T=Turn-Around, S=Sample 1) Start Frame pulse can be 4-8 clocks wide. |
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