AD9545 datasheet(103/157 Pages) AD

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Data Sheet

AD9545

Rev. A | Page 103 of 157

REFERENCE SWITCHING

REFERENCE SWITCHING OVERVIEW

The AD9545 has a sophisticated reference switching mechanism

administered by an internal controller. In general, the DPLL

operates in closed-loop mode, wherein it locks to the frequency

and phase of a reference input signal. However, if a reference

becomes invalid, the AD9545 can automatically switch to a

different reference input, depending on how the user programs

translation profiles (see the Translation Profiles section). In the

absence of any valid references, the AD9545 switches to one of

the two open-loop operating modes: holdover or freerun. The

DPLL selects freerun, holdover or manual/automatic source

selection per the DPLL mode selection flowchart of Figure 83.

The holdover, Translation Profile x.y valid, and priority

selection bubbles have associated flowcharts per Figure 84,

Figure 85 and Figure 86, respectively.

The DPLL has three status indicators to notify the user when

the DPLL begins the switch to a new reference input or when

the DPLL enters freerun or holdover mode. These indicators

(where x is 0 or 1) reside in Bits[D7:D5] of Register 0x3011 and

•

DPLLx reference switching

•

DPLLx freerun entered

•

DPLLx holdover entered bit

The DPLLx reference switching bit latches to Logic 1 when the

DPLL is in the process of switching to an active translation

profile. The DPLLx freerun entered bit latches to Logic 1 when

the DPLL enters freerun mode. The DPLLx holdover entered bit

latches to Logic 1 when the DPLL enters holdover mode. Because

these are latched bits, the user must clear them via Bits[D7:D5]

of Register 0x200C and Register 0x2011 to obtain visibility of

subsequent state transitions to reference switching, freerun, or

holdover (see the Interrupt Request (IRQ) section).

AD9545 Datasheet(PDF) 103 Page - Analog Devices