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Data Sheet

AD9545

Rev. A | Page 105 of 157

HOLDOVER

DPLLx HISTORY

AVAILABLE?

YES

DPLLx USES

DPLLx REERUN

TUNING WORD

DPLLx USES

DPLLx TUNING

WORD HISTORY

DPLLx

SINGLE SAMPLE

HISTORY = 1?

YES

DPLLx USES

MOST RECENT

TUNING WORD

NOTES

1. ITALICS INDICATE REGISTER MAP BITFIELD.

Figure 84. Holdover Flow Chart

Note that freerun mode overrides holdover mode (see Figure 83).

Furthermore, freerun mode and holdover mode both override

the manual/automatic source selection modes available via the

DPLLx translation profile select mode bit field (see the

Manual/Automatic Translation Profile Selection section).

MANUAL/AUTOMATIC TRANSLATION PROFILE

SELECTION

Assuming that both the DPLLx force holdover and DPLLx force

freerun bits are Logic 0, the DPLL selects a translation profile

based on the 2-bit DPLLx translation profile select mode bit

field (where x is 0 or 1) in Bits[D3:D2] of Register 0x2105,

Bits[3:2] or 0x2205, Bits[3:2]. The DPLLx translation profile

select mode bit field supports four translation profile selection

modes:

•

Automatic, priority-based translation profile selection

(default)

•

Manual translation profile selection with fallback to

priority-based translation profile selection

•

Manual translation profile selection with fallback to

holdover

•

Manual only translation profile selection

To program the DPLLx translation profile select mode bit field,

select the corresponding mode (see Table 50).

Table 50. DPLLx Translation Profile Select Mode Settings

DPLLx Translation Profile

Select Mode (Decimal)

Description

Automatic, priority-based

translation profile selection

Manual translation profile

selection with fallback to priority-

based translation profile selection

Manual translation profile

selection with fallback to holdover

Manual only translation profile

selection

Manual Only Translation Profile Selection

The manual only translation profile selection mode (DPLLx

translation profile select mode = 3) is not a recommended

operating mode as it carries with it several operational caveats.

Contact ADI for application support on using the manual only

translation profile selection mode.

Manual Translation Profile Selection with Fallback to

Holdover

In the manual translation profile selection with fallback to

holdover mode (DPLLx translation profile select mode = 2), the

user specifies a particular translation profile for manual

operation using the 3-bit DPLLx assign translation profile bit

(where x is 0 or 1) in Bits[D6:D4] of Register 0x2105 or 0x2205.

The value (0 to 5) programmed into the DPLLx assign

translation profile bit field identifies the desired translation

profile, x.y, where y corresponds to the value in the DPLLx

assign translation profile bit field. If the specified translation

profile is not valid, the DPLL switches to holdover operation

(open loop). However, depending on the status of the tuning

word history processor (see the Tuning Word History section),

the DPLL may select freerun operation instead of holdover.

Manual Translation Profile Selection with Fallback to

Priority-Based Translation Profile Selection

In the manual translation profile selection with fallback to

priority-based translation profile selection mode (DPLLx

translation profile select mode = 1), the user specifies a

particular translation profile for manual operation in the same

manner as described in the Manual Translation Profile

Selection with Fallback to Holdover section. However, if the

selected profile is not valid, rather than switching to holdover

mode, the DPLL attempts to use the priority-based selection

process (see the Automatic, Priority-Based Translation Profile

Selection section for a description of priority-based selection).

If the DPLL is unable to find a translation profile per the

priority selection process, it switches to holdover or freerun

operation per Figure 84.

Automatic, Priority-Based Translation Profile Selection

The priority associated with a particular translation profile

depends on the programmed value of the 5-bit Profile x.y

selection priority bit field (where x is the DPLL channel (0 or 1)

and y is the profile (0 to 5)) in Bits[D5:D1] of register addresses:

0x1200, 0x1220, 0x1240, 0x1260, 0x1280, 0x12A0, 0x1600,

0x1620, 0x1640, 0x1660, 0x1680, and 0x16A0. The lower the

value stored in the Profile x.y selection priority bit field, the

higher the priority of the associated input reference source.

That is, 31 is the lowest (least favored) selection priority and 0

the highest (most favored) selection priority.

In the automatic, priority-based translation profile selection

mode (DPLLx translation profile select mode = 0), the DPLL

relies solely on the automatic priority selection process shown

in Figure 86 for choosing a translation profile. However, if the

DPLL is unable to find a translation profile per the priority

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