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AD9545 Datasheet(PDF) 106 Page - Analog Devices

Part # AD9545
Description  Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner
PDF  157 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9545 Datasheet(HTML) 106 Page - Analog Devices

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AD9545
Data Sheet
Rev. A | Page 106 of 157
selection process, it switches to holdover or freerun operation
per Figure 84.
As shown in Figure 86, priority-based selection involves an
automatic search through the Profile x.y selection priority bit
fields in Bits[D5:D1] of register addresses: 0x1200, 0x1220,
0x1240, 0x1260, 0x1280, 0x12A0, 0x1600, 0x1620, 0x1640,
0x1660, 0x1680, and 0x16A0. The goal is to identify the
translation profile with the most favored (lowest) Profile x.y
selection priority bit field value for a given channel (DPLL0 or
DPLL1). Thus, the DPLL selects the most favored translation
profile when the current profile becomes invalid.
Translation Profile Validation
As shown in Figure 83, the manual/automatic translation profile
selection modes require validation of the selected translation
profile. Figure 85 shows a flowchart of the translation profile
validation process.
Part of the translation profile validation process requires
verification of the validity of the reference source associated
with the translation profile. Because the reference source
associated with a translation profile can be any one of the three
different source types listed below (per Table 38), determining
what constitutes a valid reference depends on the source type.
•
REFA, REFAA, REFB, or REFBB reference input
•
Auxiliary NCO 0 or NCO 1
•
DPLL0/DPLL1 feedback path
The source dependent validation decisions appear in the
reference source validation portion of the flowchart shown in
Figure 85.
Revertive and Nonrevertive Reference Switching
Revertive reference switching means that if the reference
associated with a translation profile (Translation Profile 0, for
example) becomes invalid and the DPLL switches to a new
translation profile (Translation Profile 1, for example), and the
reference associated with Translation Profile 0 become valid
again, the DPLL switches back (reverts) to Translation Profile 0,
even though the reference associated with Translation Profile 1
is valid.
Nonrevertive reference switching means that if the reference
associated with a translation profile (Translation Profile 0.0, for
example) becomes invalid and the DPLL switches to a new
translation profile (Translation Profile 0.1, for example), the
DPLL continues to use Translation Profile 0.1 even if the
reference associated with Translation Profile 0.0 becomes valid
again. See the Automatic, Priority-Based Translation Profile
Selection section on how to assign a priority value to a
translation profile.
The automatic, priority-based translation profile selection
process provides for revertive and nonrevertive reference
switching using the difference between the priority of the
current translation profile and the priority of the previous
switched from translation profile to make the revertive or
nonrevertive decision. Specifically, if the value of the Profile x.y
selection priority bit field of the current translation profile is at
least 8 more than the Profile x.y selection priority bit field of the
switched from translation profile, it means that the current
translation profile has significantly lower priority than the
switched from translation profile. Therefore, the DPLL reverts
to the switched from translation profile as soon as its reference
source becomes valid. Alternatively, if the Profile x.y selection
priority bit field of the current translation profile is 0 to 7 more
than the Profile x.y selection priority bit field of the switched
from translation profile, the current translation profile has only
marginally lower priority than the switched from translation
profile. Therefore, the DPLL does not revert, but remains with
the current translation profile until its reference source becomes
invalid (or the user selects a new translation profile manually).
In summary, the priority separation between the current
translation profile and the previously switched from translation
profile determines whether reference switching is revertive or
nonrevertive. Specifically, revertive switching requires the value
of the Profile x.y selection priority bit field of the switched from
translation profile to be at least 8 lower than the Profile x.y
selection priority bit field of the current translation profile.
Otherwise, non-revertive reference switching applies. That is, a
priority separation of 8 marks the boundary between revertive
and nonrevertive reference switching.
Active Profile
When the DPLL selects a particular translation profile, whether
manually or automatically, the selected profile becomes active.
When a translation profile is active, the corresponding DPLLx
Profile y active bit is Logic 1, with Logic 0 constituting inactive.
The DPLLx Profile y active bits (where x is 0 or 1 and y is the 0
to 5) reside in Bits[D5:D0] of Register 0x3009 and Register 0x300A.
The IRQ status section of the register map indicates Logic 0 to
Logic 1 transitions of the DPLLx Profile y active bits via their
corresponding DPLLx Profile y activated bits in Bits[D5:D0] of
Registers 0x3013 and 0x3018. Because these are latched bits, the
user must clear them via Bits[D5:D0] of Register 0x200E and
Register 0x2013 to obtain visibility of subsequent Logic 0 to
Logic 1 transitions of the DPLLx Profile y active bits (see the
Interrupt Request (IRQ) section).
An active translation profile is not the same as a valid translation
profile. That is, a profile can be valid without being active.
When all translation profiles for a particular DPLL are inactive,
the user can find the most recently active profile via the 3-bit
DPLLx active profile bit field (where x is 0 or 1) in Bits[D6:D4]
of Register 0x3101 and Register 0x3201. The value of the 3-bit
number corresponds to the most recently active profile. If a
translation profile is currently active (as indicated by one of the
DPLLx Profile y active bits), the DPLLx active profile bit field
reflects the value of the currently active profile.



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