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AD9545 Datasheet(PDF) 118 Page - Analog Devices

Part # AD9545
Description  Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner
PDF  157 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9545 Datasheet(HTML) 118 Page - Analog Devices

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AD9545
Data Sheet
Rev. A | Page 118 of 157
relaxes this requirement. The ping pong TDC processor
monitors the two auxiliary TDCs and performs the requisite
control functions necessary to observe two consecutive rising
edge events without requiring advance knowledge of the input
period. Because the ping pong TDC processor requires time to
execute the control functions, the user must ensure at least 10 µs
between a pair of successive rising edges. Otherwise, the ping
pong TDC may miss or incorrectly interpret an edge event.
The ping pong TDC is especially useful for monitoring the
occurrence of an input signal with arbitrarily spaced pulses. For
example, suppose an input signal is a pulse that identifies some
random asynchronous event with a long wait time. Because the
ping pong TDC routes to the user time stamp processor, the
user can set up a pulse monitor with an extended span enabling
the capture of a random event.
This extended span is possible because user time stamps have a
40-bit integer part for which an increment of one corresponds
to the period of its time base. Furthermore, the time base
period is established by one of the auxiliary NCOs. As such, the
user may, for example, program the auxiliary NCO for 1 Hz,
yielding a user time stamp span of 240 sec (~35,000 years) with
1 ps granularity. The ability to use a 1 Hz time base enables the
ping pong TDC to monitor input pulses having an extended
span between pulses.
Mx PIN
SWITCH
MATRIX
M0
M1
M2
M3
M4
M5
M6
AUX
TDC 0
TIME
STAMPS
PING PONG
TDC
PROCESSOR
TIME
STAMPS
AUX
TDC 1
TO DIGITAL
CROSS POINT
MUX
TIME
STAMPS
CLOCK SOURCE
(DERIVED FROM SYSTEM CLOCK)
PING PONG TDC
Figure 92. Ping Pong TDC Block Diagram



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