AD9545 datasheet(120/157 Pages) AD

120 / 157 page

AD9545

Data Sheet

Rev. A | Page 120 of 157

By default, the offset frequency value is zero; therefore, the

default output frequency is the center frequency. The main

purpose for the offset frequency is to give an external p rocessor

or controller that is limited to 32-bit processing capability the

ability of rapidly changing the output frequency. For example, it

is cumbersome for a 32-bit machine to compute the 56-bit

center frequency and then deliver it to the register map.

The 32-bit auxiliary NCO x offset frequency bit field alleviates

this problem because the user can initially program the

appropriate 56-bit center frequency and then use 32-bit offset

values to change the output frequency. The 32-bit offset value

allows a 32-bit machine to operate in its native 32-bit

environment and facilitates rapid changing of the output

frequency. The offset values offer less precise tuning than the

center frequency (2−24 Hz vs. 2−40 Hz resolution).

Depending on the tuning range for a given application, the user

can use a combination of the center and offset values to

minimize the number of 8-bit registers required to cover the

range, while obtaining better tuning resolution. For example, it

may be possible to select a center and offset value that allows

the offset to remain fixed over the tuning range yet constrains

tuning changes of the center value to the lower 8, 16, 24, or 32

bits of the auxiliary NCO x center frequency bit field. Using the

auxiliary NCO x center frequency bit field provides 2−40 Hz

tuning resolution (as opposed to 2−24 Hz tuning resolution for the

auxiliary NCO x offset frequency bit field).

AUXILIARY NCO PHASE OFFSET

In addition to specifying the frequency of the auxiliary NCO,

the user can specify a relative phase offset, via the signed (twos

complement) 40-bit auxiliary NCO x delta bit field (where x is 0

or 1) in Register 0x2814 to Register 0x2818 and Register 0x2854

to Register 0x2858. The units associated with auxiliary NCO x

delta bit field depend on the value of the auxiliary NCO x delta

type bit (where x is 0 or 1) in Bit D0 of Register 0x281F and

When auxiliary NCO x delta type = 0, auxiliary NCO x delta

constitutes a signed absolute time offset with units of

picoseconds (a range of approximately ±0.55 sec, but the user

must limit the value to ±1 period of the auxiliary NCO). When

auxiliary NCO x delta type = 1, auxiliary NCO x delta

constitutes a signed relative offset specified as a fraction of the

period of the auxiliary NCO (a range of −½ UI to almost

+½ UI). In either case, if the user specifies an auxiliary NCO x

delta value exceeding the upper bound (that is, greater than 1

UI or |½ UI| per auxiliary NCO x delta type), the device sets the

auxiliary NCO x delta overflow to Logic 1 (where x is 0 or 1) in

Bit D7 of Register 0x3002 or Register 0x3002.

For the following two cases, to introduce a phase offset of

−15.5°assume an auxiliary NCO frequency of 10 kHz per the

auxiliary NCO x center frequency and auxiliary NCO x offset

frequency bit fields.

Case 1: Auxiliary NCO x Delta Type = 0

A phase offset of −15.5° corresponds to a time offset of

t = (−15.5/360)/(10 kHz)

= −4.3055555556 µs (to 10 decimal places)

Because auxiliary NCO x delta requires units of picoseconds,

Auxiliary NCO x Delta = (−4.3055555556 µs)/ps

= −4,305,556 (nearest integer)

= 0xFFFFBE4D6C (40-bit hexadecimal)

Case 2: Auxiliary NCO x Delta Type = 1

Because auxiliary NCO x delta type = 1, the phase offset must

be within ±180° to satisfy the ±½ UI range. A phase offset of

−15.5° satisfies this requirement; therefore,

UI = −15.5°/360°

= −0.0430555556 (to 10 decimal places)

Because the auxiliary NCO x delta bit field is a signed 40-bit

integer, scale the result by 240:

Auxiliary NCO x Delta = −0.0430555556 × 240

= −47,340,083,974 (nearest integer)

= 0xF4FA4FA4FA (40-bit hexadecimal)

When the user programs an auxiliary NCO x delta value and

asserts the IO_UPDATE bit, the AD9545 automatically imposes

a specified upper limit on how fast the phase can change (phase

slew). See the Auxiliary NCO Phase Slew Limit section for

details.

AUXILIARY NCO PHASE SLEW LIMIT

When the user requests the application of a phase offset on one

of the auxiliary NCOs (via the auxiliary NCO x delta bit field),

the AD9545 does not necessarily apply the full phase offset all at

once. Instead, the contents of the auxiliary NCO x delta rate

limit bit field (where x is 0 or 1) in Register 0x2810 to Register

0x2813 and Register 0x2850 to Register 0x 2853 controls how

the device implements the phase offset.

When auxiliary NCO x delta rate limit = 0, normal phase offset

control ensues. That is, the device applies whatever phase offset

value is in the auxiliary NCO x delta bit field all at once.

When auxiliary NCO x delta rate limit ≠ 0, the device gradually

introduces phase changes by regulating the rate at which the

phase changes occur to prevent exceeding the limit

programmed in the auxiliary NCO x delta rate limit bit field.

The device keeps track of the total phase change and terminates

the process when the total phase change satisfies the value

established by the auxiliary NCO x delta bit field.

The auxiliary NCO x delta rate limit bit field constitutes a 32-bit

unsigned number. The units are 2−36 UI/UI, where UI is the unit

interval of the associated auxiliary NCO (1 UI is the reciprocal

of the programmed frequency of the auxiliary NCO). That is,

the user specifies the maximum rate of change of phase as

fractions of a cycle per cycle. The user must program the

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