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TMS320C80GF Datasheet(PDF) 48 Page - Texas Instruments

Part # TMS320C80GF
Description  DIGITAL SIGNAL PROCESSOR
PDF  171 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C80GF Datasheet(HTML) 48 Page - Texas Instruments

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TMS320C80
DIGITAL SIGNAL PROCESSOR
SPRS023B – JULY 1994 – REVISED OCTOBER 1997
45
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
PP multiplier (continued)
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Unsigned Input 1b
Unsigned Input 1a
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Signed Input 2b
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Signed Input 2a
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Figure 40. Signed Split Multiply Data Formats
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Unsigned Input 1b
Unsigned Input 1a
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Unsigned Input 2a
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Figure 41. Unsigned Split Multiply Data Formats
PP program-flow-control unit architecture
The PP has a three-stage fetch, address, execute (FAE) pipeline as shown in Figure 42. The pc, ipa, and ipe
registers point to the address of the instruction in each stage of the pipeline. On each cycle in which the pipeline
advances, ipa is copied into ipe, pc is copied into ipa, and the pc is incremented by one instruction (8 bytes).
The program-flow-control (pfc) unit performs instruction fetching and decoding, loop control, and handshaking
with the transfer controller. The pfc unit architecture is shown in Figure 43.
Instruction
One
Two
Three
T1
T2
T4
T3
T5
Fetch
Address
Execute
Fetch
Address
Execute
Execute
Fetch
Address
pc
ipa
ipe
Figure 42. FAE-Instruction Pipeline



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