TMS320C80GF datasheet(54/171 Pages) TI

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TMS320C80

DIGITAL SIGNAL PROCESSOR

SPRS023B – JULY 1994 – REVISED OCTOBER 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

PP instruction set (continued)

Table 11. Summary of Parallel Transfers

Operation

Load

Description

Transfer from memory into PP register

Syntax

dst = [sign] [size] [ [[cond]] ]* addrexp

dst = [sign] [size] [ [[cond]] ]* an.element

Examples

d3 = uh[n]* (a9++=[2])

d1 = * a2.sMY_ELEMENT

Operation

Store

Description

Transfer from PP register into memory

Syntax

* addrexp = [size] src [ [[n]] src–1]

* an.element = [size] src [ [[n]] src–1]

Examples

*––a2 = d3

*a9.sMY_ELEMENT = a3

Operation

Address unit arithmetic

Description

Compute address and store in PP register

Syntax

dst = [size] [ [[cond]] ] & * addrexp

dst = [size] [ [[cond]] ] & * an.element

Examples

d2 = &*(a3 + x0)

a1 = &*a9.sMY_ELEMENT

Operation

Move

Description

Transfer from PP register to PP register

Syntax

dst = [g] [ [[cond]] ] src

Examples

x2 = mf

d1 = g d3

Operation

Field extract move

Description

Transfer from PP register to PP register extracting and right-aligning one byte or halfword

Syntax

dst = [sign] [size item]

Example

d3 = ub2 d1

Operation

Field replicate move

Description

Transfer from PP register to PP register replicating the LSbyte or LShalfword to 32 bits

Syntax

dst = r [size] [[cond]] src

Example

d7 = rh d3

Legend:

[ ]

Optional parameter extension

cond

Condition code

[[ ]]

Square brackets ([ ]) must be used

sign

u = unsigned, s = signed

Use global unit

size

b = byte, h = halfword, w = word (default)

item

0 = byte0/halfword0, 1 = byte1/halfword1, 2 = byte2, 3 = byte3

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