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TMS320C80GF Datasheet(PDF) 83 Page - Texas Instruments |
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TMS320C80GF Datasheet(HTML) 83 Page - Texas Instruments |
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83 / 171 page ![]() TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 80 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 read cycles (continued) State C/D B/C A/B –/A D C B A For user-modified timing: C/D B/C A/B –/A Idle Col D Col C Col B Col A Row PAC PAC PAC Cycle Type RETRY CAS / DQM[7:0] RAS UTIME DDIN DBEN D[63:0] W TRG / CAS DSF CAS / DQM[7:0] RAS A[31:0] RL STATUS[5:0] READY FAULT UTIME PS[3:0] BS[1:0] AS[2:0] CT[2:0] CLKOUT r1 col col col col col col r6 r3 r2 r1 D/– D/– Col A c3 c2 c1 Col B c2 c1 Col C c1 Col D 4 0 For Normal Reads, 1 For PDPT Reads PAC c3 c3 c2 c3 c2 c1 Figure 64. Pipelined 1 Cycle / Column Read-Cycle Timing |
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