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TMS320C80GF Datasheet(PDF) 67 Page - Texas Instruments

Part # TMS320C80GF
Description  DIGITAL SIGNAL PROCESSOR
PDF  171 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C80GF Datasheet(HTML) 67 Page - Texas Instruments

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TMS320C80
DIGITAL SIGNAL PROCESSOR
SPRS023B – JULY 1994 – REVISED OCTOBER 1997
64
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
frame-timer registers
Each frame timer has twenty-one 16-bit registers to control its horizontal and vertical timing signals. The
registers are on-chip memory-mapped registers accessible by the MP only. Each horizontal / vertical register
pair can be accessed as a single 32-bit quantity. The register map for Frame-Timer 0 is shown in Figure 47. The
Frame-Timer 1 register map is shown in Figure 48.
Address
Address
FTCTL0
0x01820200
SETVCT0
0x01820206
SETHCT0
0x01820204
VFTINT0
0x0182020A
HESERR0
0x01820208
VESYNC0
0x0182020E
HESYNC0
0x0182020C
VEBLNK0
0x01820212
HEBLNK0
0x01820210
VSAREA0
0x01820216
HSAREA0
0x01820214
VEAREA0
0x0182021A
HEAREA0
0x01820218
VSBLNK0
0x0182021E
HSBLNK0
0x0182021C
VTOTAL0
0x01820222
HTOTAL0
0x01820220
HALINE0
0x01820224
HBLINE0
0x01820228
VCOUNT0
0x0182023E
HCOUNT0
0x0182023C
Figure 47. Frame-Timer 0 Register Map
Address
Address
FTCTL1
0x01820240
SETVCT1
0x01820246
SETHCT1
0x01820244
VFTINT1
0x0182024A
HESERR1
0x01820248
VESYNC1
0x0182024E
HESYNC1
0x0182024C
VEBLNK1
0x01820252
HEBLNK1
0x01820250
VSAREA1
0x01820256
HSAREA1
0x01820254
VEAREA1
0x0182025A
HEAREA1
0x01820258
VSBLNK1
0x0182025E
HSBLNK1
0x0182025C
VTOTAL1
0x01820262
HTOTAL1
0x01820260
HALINE1
0x01820264
HBLINE1
0x01820268
VCOUNT1
0x0182027E
HCOUNT1
0x0182027C
Figure 48. Frame-Timer 1 Register Map
frame-timer register programming
The register format for the frame-timer control registers is shown in Figure 49. All other registers are 16-bit
values. For programming details, see the
TMS320C80 Video Controller User’s Guide (literature number
SPRU111).



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