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TMS320C80GF Datasheet(PDF) 56 Page - Texas Instruments |
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TMS320C80GF Datasheet(HTML) 56 Page - Texas Instruments |
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56 / 171 page ![]() TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 53 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 PP opcode formats (continued) Table 12. Data Unit Mnemonics MNEMONIC FUNCTION A A = 1 selects arithmetic operations, A = 0 selects Boolean operations ALU Operation For Boolean operation (A = 0) select the 8 ALU function signals. For arithmetic operation (A = 1), odd bits specify the ALU function and even bits define the ALU function modifiers. class Operation class, determines routing of ALU operands cond condition code dst D register destination or lower 3 bits of non-D register code dst1 ALU dest. for MPY||ADD, MPY||EALU, or EALU||ROTATE operation. D register or lower 3 bits of non-D register code dst2 Multiply dest. for MPY||ADD or MPY||EALU operation or rotate dest. for EALU||ROTATE operation. D register dstbank ALU register bank imm.src2 5-bit immediate for src2 of ALU operation 32-Bit Immediate 32-bit immediate for src2 of ALU operation oper Six-operand data unit operation (MPY||ADD, MPY||SADD, MPY||EALU, EALU||ROTATE, divi) Operation Miscellaneous operation src1 ALU source 1 register code (D register unless srcbank or s1bank is used) src2 D register used as ALU source 2 src3 D register for multiplier source (MPY||ADD or MPY||EALU) or rotate amount (EALU||ROTATE) src4 D reg for ALU C port operand or EALU||ROTATE mask generator input or multiplier source 2 for MPY||ADD, MPY||EALU s1bnk Bits 5-3 of src1 register code (bit 6 assumed to be 0) |
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