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TMS320C80GF Datasheet(PDF) 71 Page - Texas Instruments |
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TMS320C80GF Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 171 page ![]() TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 68 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 PT maximum (PTMAX) register (0x01820008) The PTMAX register determines the maximum number of cycles after PTMIN has elapsed that a packet transfer executes before timing out. Figure 55 showns the format of the PTMAX register. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PTMAX Figure 55. PTMAX Register fault status (FLTSTS) register (0x0182000C) The FLTSTS register indicates the cause of a memory access fault. Fault status bits are cleared by writing a 1 to the appropriate bit. Figure 56 shows the format of the fault status (FLTSTS) register. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 P C P C P C P C P P P P P P P P XPT M PP # 3210 PP# 321 0 PC PP PPx Cache / DEA Fault PPx Packet-Transfer Fault XPT M Faulting XPT MP Packet-Transfer Fault Figure 56. FLTSTS Register packet-transfer parameters The most efficient method for data movement in a TMS320C80 system is through the use of packet transfers (PTs). Packet transfers allow the TC to move blocks of data autonomously between a specified src and dst memory region. Requests for the TC to execute a packet transfer may be made by the MP, PPs, VC, or external devices. A packet-transfer parameter table describing the data packet and how it is to be transferred must be programmed in on-chip memory before the transfer is requested. The parameter table formats for long-form and short-form packet transfers are shown in Figure 57. |
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