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TMS320C80GF Datasheet(PDF) 84 Page - Texas Instruments |
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TMS320C80GF Datasheet(HTML) 84 Page - Texas Instruments |
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84 / 171 page ![]() TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 81 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 read cycles (continued) C B A Col C Col B Col A C B A C B A Row CAS / DQM[7:0] D[63:0] DBEN UTIME DDIN RAS W TRG / CAS RAS DSF CAS / DQM[7:0] READY RETRY FAULT RL STATUS[5:0] A[31:0] r1 col col col col r6 r3 r2 r1 UTIME BS[1:0] PS[3:0] CT[2:0] AS[2:0] State CLKOUT PAC PAC Cycle Type For user-modified timing: c2 c1 Col A c1 Col B Col C 5 0 For Normal Reads, 1 For PDPT Reads PAC Idle c2 c2 c1 Figure 65. Nonpipelined 1 Cycle / Column Read-Cycle Timing |
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