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S5335 Datasheet(PDF) 55 Page - Applied Micro Circuits Corporation

Part # S5335
Description  PCI Bus Controller, 3.3V
PDF  189 Pages
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Manufacturer  AMCC [Applied Micro Circuits Corporation]
Direct Link  http://www.amcc.com
Logo AMCC - Applied Micro Circuits Corporation

S5335 Datasheet(HTML) 55 Page - Applied Micro Circuits Corporation

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S5335 – PCI Bus Controller, 3.3V
Revision 5.01 – November 30, 2005
AMCC Confidential and Proprietary
DS1657
55
Data Sheet
The PCI bus operation registers are mapped as 16
consecutive DWORD registers located at the address
space (I/O or memory) specified by the Base Address
Register 0. These locations are the primary method of
communication between the PCI and Add-On buses.
Data, software-defined commands and command
parameters can be either exchanged through the mail-
boxes, transferred through the FIFO in blocks under
program control, or transferred using the FIFOs under
Bus Master control. Table 43 lists the PCI Bus Opera-
tion Registers.
Table 43. Operation Registers — PCI Bus
Address Offset
Abbreviation
Register Name
00h
OMB1
Outgoing Mailbox Register 1
04h
OMB2
Outgoing Mailbox Register 2
08h
OMB3
Outgoing Mailbox Register 3
0Ch
OMB4
Outgoing Mailbox Register 4
10h
IMB1
Incoming Mailbox Register 1
14h
IMB2
Incoming Mailbox Register 2
18h
IMB3
Incoming Mailbox Register 3
1Ch
IMB4
Incoming Mailbox Register 4
20h
FIFO
FIFO Register port (bidirectional)
24h
MWAR
Master Write Address Register
28h
MWTC
Master Write Transfer Count Register
2Ch
MRAR
Master Read Address Register
30h
MRTC
Master Read Transfer Count Register
34h
MBEF
Mailbox Empty/Full Status
38h
INTCSR
Interrupt Control/Status Register
3Ch
MCSR
Bus Master Control/Status Register



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