SH7616 datasheet(141/935 Pages) RENESAS

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Section 3 Oscillator Circuits and Operating Modes

Rev. 2.00 Mar 09, 2006 page 115 of 906

REJ09B0292-0200

Bit:

654

321

PLL2ST

PLL1ST CKIOST

—

FR3

FR2

FR1

FR0

Initial value:

—

R/W:

R/W

Bit 7—PLL2ST: Switching is possible in modes 0 to 3. In modes 4 to 6, PLL circuit 2 cannot be

used. In these modes, this bit always reads 1.

Bit 7: PLL2ST

Description

PLL circuit 2 used

PLL circuit 2 not used

Bit 6—PLL1ST: Switching is possible in modes 0, 1, 4, and 5. In modes 2, 3, and 6, PLL circuit 1

cannot be used. In these modes, this bit always reads 1.

Bit 6: PLL1ST

Description

PLL circuit 1 is used

PLL circuit 1 is not used

Bit 5—CKIOST: Setting is possible in modes 0 to 3. In modes 4 to 6, the CKIO pin is an input

pin. In these modes, this bit always reads 1.

Bit 5: CKIOST

Description

The CKIO pin outputs E

The CKIO pin is in the high-impedance state (Do not place CKIO in the high-

impedance state when PLL circuit 1 is operating)

Bit 4—Reserved: This bit is always read as 0. The write value should always be 0.

Bits 3 to 0—FR3 to FR0: The internal clock frequency and CKIO output frequency (modes 0–2)

can be set by frequency setting bits FR3–FR0. The values that can be set in bits FR3–FR0 depend

on the mode and whether PLL circuit 1 and PLL circuit 2 are operating or halted. The following

tables show the values that can be set in FR3–FR0, and the internal clock and CKIO output

frequency ratios, taking the external input clock frequency as 1.

SH7616 Datasheet(PDF) 141 Page - Renesas Technology Corp

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