SH7727 datasheet(114/1109 Pages) RENESAS

Part #	SH7727

Description	Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

PDF	1109 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

114 / 1109 page

Section 2 CPU

Rev. 5.00 Dec 12, 2005 page 42 of 1034

REJ09B0254-0500

Table 2.8

T Bit

SH7727 CPU

Description

Example of Other CPU

CMP/GE R1,R0

TRGET0

TRGET1

If R0

≥ R1, the T bit is set.

A branch is made to TRGET0

if R0

≥ R1, or to TRGET1 if R0 < R1.

CMP.W R1,R0

BGE

TRGET0

BLT

TRGET1

ADD

#–1,R0

CMP/EQ #0,R0

TRGET

The T bit is not set by ADD.

If R0 = 0, the T bit is set.

A branch is made if R0 = 0.

SUB.W #1,R0

BEQ

TRGET

Immediate Data: Byte immediate data is placed inside the instruction code. Word and longword

immediate data is not placed inside the instruction code, but in a table in memory. The table in

memory is referenced with an immediate data transfer instruction (MOV) using PC-relative

addressing mode with displacement.

Table 2.9

Immediate Data Referencing

Type

SH7727 CPU

Example of Other CPU

8-bit immediate

MOV

#H'12,R0

MOV.B

#H'12,R0

16-bit immediate

MOV.W @(disp,PC),R0

........

.DATA.W H'1234

MOV.W #H'1234,R0

32-bit immediate

MOV.L

@(disp,PC),R0

........

.DATA.L H'12345678

MOV.L

#H'12345678,R0

Note: Immediate data is referenced by @(disp,PC).

SH7727 Datasheet(PDF) 114 Page - Renesas Technology Corp

SH7727 Datasheet(HTML) 114 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL