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SH7727 Datasheet(PDF) 118 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 118 Page - Renesas Technology Corp |
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118 / 1109 page  Section 2 CPU Rev. 5.00 Dec 12, 2005 page 46 of 1034 REJ09B0254-0500 Addressing Mode Instruction Format Effective Address Calculation Method Calculation Formula Indexed GBR indirect @(R0, GBR) Effective address is sum of register GBR and R0 contents. GBR R0 GBR + R0 + GBR + R0 PC-relative with displacement @(disp:8, PC) Effective address is PC with 8-bit displacement disp added. After disp is zero-extended, it is multiplied by 2 (word) or 4 (longword), according to the operand size. With a longword operand, the lower 2 bits of PC are masked. PC H'FFFFFFFC + 2/4 x & * *: With longword operand disp (zero-extended) PC + disp × 2 or PC&H'FFFFFFFC + disp × 4 Word: PC + disp × 2 Longword: PC&H'FFFFFFFC + disp × 4 |
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