SH7727 datasheet(120/1109 Pages) RENESAS

120 / 1109 page

Section 2 CPU

Rev. 5.00 Dec 12, 2005 page 48 of 1034

REJ09B0254-0500

2.4.2

DSP Data Addressing

Two different memory accesses are made with DSP instructions. The two kinds of instructions are

X and Y data transfer instructions (MOVX.W, MOVY.W) and single data transfer instructions

(MOVS.W, MOVSL). The data addressing is different for these two kinds of instruction. An

overview of the data transfer instructions is given in table 2.13.

Table 2.13 Overview of Data Transfer Instructions

X/Y Data Transfer Processing

(MOVX.W, MOVY.W)

Single Data Transfer Processing

(MOVS.W, MOVS.L)

Address register

Ax: R4, R5, Ay: R6, R7

As: R2, R3, R4, R5

Index register

Ix: R8, Iy: R9

Is: R8

Addressing

Nop/Inc (+2)/index addition:

post-increment

Nop/Inc (+2, +4)/index addition:

post-increment

—

Dec (–2, –4): pre-decrement

Modulo addressing

Possible

Not possible

Data bus

XDB, YDB

LDB

Data length

16 bits (word)

16/32 bits (word/longword)

Bus contention

Yes

Memory

X/Y data memory

Entire memory space

Source register

Dx, Dy: A0, A1

Ds: A0/A1, M0/M1, X0/X1, Y0/Y1,

A0G, A1G

Destination register

Dx: X0/X1, Dy: Y0/Y1

Ds: A0/A1, M0/M1, X0/X1, Y0/Y1,

A0G, A1G

X/Y Data Addressing: With DSP instructions, the X and Y data memory can be accessed

simultaneously using the MOVX.W and MOVY.W instructions. Two address pointers are

provided for DSP instructions to enable simultaneous access to X and Y data memory. Only

pointer addressing can be used with DSP instructions; immediate addressing is not available.

Address registers are divided into two, with register R4 or R5 functioning as the X memory

address register (Ax), and register R6 or R7 as the Y memory address register (Ay). The following

three kinds of addressing can be used with X and Y data transfer instructions.

1. Non-update address register addressing:

The Ax and Ay registers are address pointers. They are not updated.

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